[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v4 for-4.18?] x86: support data operand independent timing mode


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Fri, 20 Oct 2023 12:53:05 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=z7WBWg0w4CiKSxgeFcL0cfjpZ9HsA1QZTElgoVPM4tA=; b=ko1r4Q9SrdpoFa6n5ajWKIufVnDb/0oaN9mUKn69t2LCzR4KPhVo3+I1eluAkSyMK6SRtQK9eKih5e0PLHZiHDvYh0aaLNh5XEFcGefmXYxy1tQiOj6qcl/Ov4nD9HtpSCpM+tkefZcOqUqmDEb0xRnYXEHcUUy14LLV/QKKPpPZPXwlNS5HaPvP+YGQAtcjPdnRRwr9LWkeCsVcGMObK1n5BQIW9B9gIOIOPIlqH0sbgEXLhxh5k2YSXvEulSWPprEA7fE0VOpbqjUZHhHHlElqYZ5u3tLwWywUzMaWpbf6N1MNNJ3RV5kDaLvmJIiddg+VQ39k/KzFPisf4lU8qA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZtYHY6c3TWJ93UAnstcVvUDi+SOb81SAQs/kx8YMRUFBUsgcg9b1D0/kbODd3KRetwDkKgtmL6yScnzJ+w5zZ1DLfCKTxPmaqMIcrpEvZyQD5bnuUwuRulqDWBKwT4gg69E12pX2dwUu6wN8IDJOk1MVWzI6ogV6KBFPjXoRMv0ck0KegBXKQUAHINAcXjNeN31QbcjqSsk9hZhvt2cGmDTbUbL3zDpp8NfH2CwtLhwDSGRlCHSLeSDQ4TY4vjEMlPicK6dgjV1mnRscbY3HVo671PxmhNvWWAz1A8A/+7yke8k8FWdNLGx/mqv+XptP+HRi2Z8sT3eO7O/W3zOmNg==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, George Dunlap <george.dunlap@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Demi Marie Obenour <demi@xxxxxxxxxxxxxxxxxxxxxx>, Henry Wang <Henry.Wang@xxxxxxx>
  • Delivery-date: Fri, 20 Oct 2023 10:53:29 +0000
  • Ironport-data: A9a23:NkLmMKqdyg2tv/72pxru3lu46/xeBmLhZBIvgKrLsJaIsI4StFCzt garIBmEOKuNZmr0e9F+Povn80sP6sXcz9VhHQtqpXgyEyoW8ZuZCYyVIHmrMnLJJKUvbq7FA +Y2MYCccZ9uHhcwgj/3b9ANeFEljfngqoLUUbOCYmYpA1Y8FE/NsDo788YhmIlknNOlNA2Ev NL2sqX3NUSsnjV5KQr40YrawP9UlKq04GhwUmAWP6gR5waGzihNVvrzGInqR5fGatgMdgKFb 76rIIGRpgvx4xorA9W5pbf3GmVirmn6ZFXmZtJ+AsBOszAazsAA+v9T2Mk0MC+7vw6hjdFpo OihgLTrIesf0g8gr8xGO/VQO3kW0aSrY9YrK1Dn2SCY5xWun3cBX5yCpaz5VGEV0r8fPI1Ay RAXACoMTUGtn/qT+eiAG+Ry2dYKDO3VGIxK7xmMzRmBZRonabbqZvyToPN9gnI3jM0IGuvCb c0EbzYpdA7HfxBEJlYQDtQ5gfusgX78NTZfrTp5p4JuuzSVkFM3jeeraYSEEjCJbZw9ckKwv GXJ8n6/GhgHHNee1SCE4jSngeqncSbTAdhMSuXgr6Iy6LGV7mY3AjwvVHzlmuaGjFyVWPVmL Hcq0AN7+MDe82TuFLERRSaQonSJoxodUNp4CPAh5UeGza+8yxaUAC0IQyBMbPQitdQqXno62 1mRhdTrCDdz9rqPRhq19KqQrD60ETgYKykFfyBsZRAe/9DprYU3jxTOZtVuCqi4ipvyAz6Y6 y+OhDgzgfMUl8Fj/6m2+FHvgjSyp4PIRAo4+gXWWG2+6gpzIoWiYuSAyVXd9+cGE4+fQXGIp n1CkM+bhN3iFrmInS2JBekIQreg4q/cNCWG2AA+WZ486z6q5nivO5hK5y1zL1toNcBCfiL1Z EjUukVa45o70GaWUJKbqrmZU6wCpZUM3/y8PhwIRrKiuqRMSTI=
  • Ironport-hdrordr: A9a23:JKlE6aMlOHg/lcBcTkyjsMiBIKoaSvp037BL7TETdfUxSKfzqy nApoVn6faFslsssQ4b6La90cW7LU80jKQFhrX5Xo3DYOCOggLBEGgF1+TfKlbbehEWmNQy6Y 5QN4JaJOLdNmVTtPDfzDSRPv4c6LC8gcWVrNab5XJgUg1wVql42SNUNy7zKDwVeCB2QbUfPr qwj/A33waISDA2aceHBn0INtKzw+HjpdbDfBZDPRg68wOD5AnYk4LSIlykxR8QXDNEhYoz6G StqX2C2oyz9/y4yhuZ0XbP75JQgrLau6J+OPA=
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Fri, Oct 20, 2023 at 07:53:51AM +0200, Jan Beulich wrote:
> [1] specifies a long list of instructions which are intended to exhibit
> timing behavior independent of the data they operate on. On certain
> hardware this independence is optional, controlled by a bit in a new
> MSR. Provide a command line option to control the mode Xen and its
> guests are to operate in, with a build time control over the default.
> Longer term we may want to allow guests to control this.

Couldn't we just expose DOITM in MSR_ARCH_CAPS (by setting the A flag
in the feature enumeration) and handle accesses to
MSR_UARCH_MISC_CTRL?

The complications would be with the leveling of the feature across a
pool, as AFAICT the bit needs to be OR'ed rather than AND'ed across
hosts.

It would also then need some special handling in order to allow
reporting DOITM on hardware that doesn't have the feature (and writes
to MSR_UARCH_MISC_CTRL won't be forwarded to hardware in that case).

>From an implementation PoV we might want to treat this as SSBD, and
allow Xen to run with the guest selection.

Anyway, likely much more than what you want to do

> Since Arm64 supposedly also has such a control, put command line option
> and Kconfig control in common files.
> 
> [1] 
> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html
> 
> Requested-by: Demi Marie Obenour <demi@xxxxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> Release-acked-by: Henry Wang <Henry.Wang@xxxxxxx>

Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

The only concern I have is with the Kconfig and command line options
being named DIT instead of DOIT, which would be what I would search
for given the documentation from Intel.  Maybe that's for unification
with Arm?

> ---
> This may be viewed as a new feature, and hence be too late for 4.18. It
> may, however, also be viewed as security relevant, which is why I'd like
> to propose to at least consider it. Note that already for 4.17 it had a
> release ack to go in late; just the necessary normal ack continues to be
> missing.
> 
> Slightly RFC, in particular for whether the Kconfig option should
> default to Y or N.
> 
> I would have wanted to invoke setup_doitm() from cpu_init(), but that
> works only on the BSP. On APs cpu_init() runs before ucode loading.
> Plus recheck_cpu_features() invoking identify_cpu() takes care of the
> BSP during S3 resume.

As I wrote below, we do not seem to be very consistent with where are
such setup functions called.  Would be good if we could unify all the
CPU initialization in a single function, as that could avoid
confusion, and mistakes with forgetting initialization in the resume
path.

> ---
> v4: Re-base.
> v3: Extend command line doc. Add changelog entry.
> v2: Introduce and use cpu_has_doitm. Add comment "borrowed" from the
>     XenServer patch queue patch providing similar functionality.
>     Re-base.
> 
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -33,6 +33,8 @@ The format is based on [Keep a Changelog
>     nodes using a device tree overlay binary (.dtbo).
>   - Introduce two new hypercalls to map the vCPU runstate and time areas by
>     physical rather than linear/virtual addresses.
> + - On x86, support for enforcing system-wide operation in Data Operand
> +   Independent Timing Mode.
>  
>  ### Removed
>   - On x86, the "pku" command line option has been removed.  It has never
> --- a/docs/misc/xen-command-line.pandoc
> +++ b/docs/misc/xen-command-line.pandoc
> @@ -788,6 +788,16 @@ Specify the size of the console debug tr
>  additionally a trace buffer of the specified size is allocated per cpu.
>  The debug trace feature is only enabled in debugging builds of Xen.
>  
> +### dit (x86/Intel)

Why DIT and not DOIT?  That seems to be the acronym used in Intel
docs, and what I would use to grep for in the command line document.

> +> `= <boolean>`
> +
> +> Default: `CONFIG_DIT_DEFAULT`
> +
> +Specify whether Xen and guests should operate in Data Independent Timing
> +mode. Note that enabling this option cannot guarantee anything beyond what
> +underlying hardware guarantees (with, where available and known to Xen,
> +respective tweaks applied).
> +
>  ### dma_bits
>  > `= <integer>`
>  
> --- a/xen/arch/x86/Kconfig
> +++ b/xen/arch/x86/Kconfig
> @@ -15,6 +15,7 @@ config X86
>       select HAS_ALTERNATIVE
>       select HAS_COMPAT
>       select HAS_CPUFREQ
> +     select HAS_DIT
>       select HAS_EHCI
>       select HAS_EX_TABLE
>       select HAS_FAST_MULTIPLY
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -204,6 +204,28 @@ void ctxt_switch_levelling(const struct
>               alternative_vcall(ctxt_switch_masking, next);
>  }
>  
> +static void setup_doitm(void)
> +{
> +    uint64_t msr;
> +
> +    if ( !cpu_has_doitm )
> +        return;
> +
> +    /*
> +     * We don't currently enumerate DOITM to guests.  As a conseqeuence, 
> guest
> +     * kernels will believe they're safe even when they are not.
> +     *
> +     * For now, set it unilaterally.  This prevents otherwise-correct crypto
> +     * code from becoming vulnerable to timing sidechannels.
> +     */
> +
> +    rdmsrl(MSR_UARCH_MISC_CTRL, msr);
> +    msr |= UARCH_CTRL_DOITM;
> +    if ( !opt_dit )
> +        msr &= ~UARCH_CTRL_DOITM;
> +    wrmsrl(MSR_UARCH_MISC_CTRL, msr);
> +}
> +
>  bool opt_cpu_info;
>  boolean_param("cpuinfo", opt_cpu_info);
>  
> @@ -599,6 +621,8 @@ void identify_cpu(struct cpuinfo_x86 *c)
>  
>               mtrr_bp_init();
>       }
> +
> +     setup_doitm();

We do not seem to to be very consistent about where features are
enabled, we do seem to have a tail of features that could also likely
be part of identify_cpu()? tsx_init(), update_mcu_opt_ctrl(),
MSR_SPEC_CTRL.

>  }
>  
>  /* leaf 0xb SMT level */
> --- a/xen/arch/x86/include/asm/cpufeature.h
> +++ b/xen/arch/x86/include/asm/cpufeature.h
> @@ -202,6 +202,7 @@ static inline bool boot_cpu_has(unsigned
>  #define cpu_has_tsx_ctrl        boot_cpu_has(X86_FEATURE_TSX_CTRL)
>  #define cpu_has_taa_no          boot_cpu_has(X86_FEATURE_TAA_NO)
>  #define cpu_has_mcu_ctrl        boot_cpu_has(X86_FEATURE_MCU_CTRL)
> +#define cpu_has_doitm           boot_cpu_has(X86_FEATURE_DOITM)
>  #define cpu_has_fb_clear        boot_cpu_has(X86_FEATURE_FB_CLEAR)
>  #define cpu_has_rrsba           boot_cpu_has(X86_FEATURE_RRSBA)
>  #define cpu_has_gds_ctrl        boot_cpu_has(X86_FEATURE_GDS_CTRL)
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -56,6 +56,9 @@ config HAS_COMPAT
>  config HAS_DEVICE_TREE
>       bool
>  
> +config HAS_DIT # Data Independent Timing
> +     bool
> +
>  config HAS_EX_TABLE
>       bool
>  
> @@ -187,6 +190,18 @@ config SPECULATIVE_HARDEN_GUEST_ACCESS
>  
>  endmenu
>  
> +config DIT_DEFAULT
> +     bool "Data Independent Timing default"
> +     depends on HAS_DIT
> +     help
> +       Hardware often surfaces instructions the timing of which is dependent
> +       on the data they process.  Some of these instructions may be used in
> +       timing sensitive environments, e.g. cryptography.  When such
> +       instructions exist, hardware may further surface a control allowing
> +       to make the behavior of such instructions independent of the data
> +       they act upon.  Choose the default here for when no "dit" command line
> +       option is present.

I would word the last sentence as `Note the build time value can be
changed at runtime using the "dit" command line option.`

Thanks, Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.