[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 1/4] x86/percpu: Use explicit segment registers in lib/cmpxchg{8,16}b_emu.S


  • To: Uros Bizjak <ubizjak@xxxxxxxxx>
  • From: kernel test robot <oliver.sang@xxxxxxxxx>
  • Date: Thu, 26 Oct 2023 15:01:00 +0800
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HpicIwgCyMiXMnViXnPSuo/iTpi5AXFW+c+iuqI68cY=; b=RnX0jnIKD9WVnNd8OijQojYDfKugfVs5cILKyhfg28kJVkxjS4MhL4nJd4Z8y1+CMWeRlxojfJ713ZDsIwRptsLHCLONSfR/LyG9VXR7tsolcbD72dd8AD1S8PMpj3Ot9FXWp31skTpQL+nMgHOcwHIe62rkZ4u5Q4U2wNws+3W9jdXZ3cQIwGMfrBBdZHFl7qZvavuQ1JnbnJqLOvwe3XFwyeRX6l2UvfUi94RlwXOoBoCCvH1Nggd8zDRwKrEUYjBwnr4WkQ9LVj9iGCz0gGMZqbCQRsuI3WBFhQ3Kd/RPhNei6MAMKQzT3/GB89b5wvWQ6DUvFlQgIiJr+QPAcA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=j8MgvPci7Y1Tay8zOVnShjAKxhebhzlpXuCkTiapOc7KxTTJx9Xmloej9OfiPWDCdpISYlxYA+kJCjTNzsqPQHB9pSOx9i5g7OcJO7HWtidFCl1W/7jxiuxE6XTknQw6mTlZ/g+zfo8k8Sj/MNg+RkO1gQDUi/u2oUvDURAu38Dtl1pKTdcdvSp5B2uO1l6KtnW/PDiU8++rPw/su4jCxGaLFt1FypciMQs1YEQ/CDk+XkKsdd5SFS3nPtjMXmpM3e3IRZRn9DuaB4TY9cjqEFC3Aj1hu9vvRpoTGuKh5rnn5C2ANH+sLTfR72f+2Oi9HNE46SwJF7JUFkjStw9DMQ==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com;
  • Cc: <oe-lkp@xxxxxxxxxxxxxxx>, <lkp@xxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Ingo Molnar <mingo@xxxxxxxxxx>, Borislav Petkov <bp@xxxxxxxxx>, Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>, "H. Peter Anvin" <hpa@xxxxxxxxx>, Peter Zijlstra <peterz@xxxxxxxxxxxxx>, <linux-kernel@xxxxxxxxxxxxxxx>, <x86@xxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Uros Bizjak <ubizjak@xxxxxxxxx>, <oliver.sang@xxxxxxxxx>
  • Delivery-date: Thu, 26 Oct 2023 07:01:31 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>


Hello,

kernel test robot noticed "general_protection_fault:#[##]" on:

commit: 33c7952d925e905f7af1fb7628e48e03f59885da ("[PATCH 1/4] x86/percpu: Use 
explicit segment registers in lib/cmpxchg{8,16}b_emu.S")
url: 
https://github.com/intel-lab-lkp/linux/commits/Uros-Bizjak/x86-percpu-Use-explicit-segment-registers-in-lib-cmpxchg-8-16-b_emu-S/20231017-111304
base: https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git 
92fe9bb77b0c9fade150350fdb0629a662f0923f
patch link: 
https://lore.kernel.org/all/20231012161237.114733-2-ubizjak@xxxxxxxxx/
patch subject: [PATCH 1/4] x86/percpu: Use explicit segment registers in 
lib/cmpxchg{8,16}b_emu.S

in testcase: boot

compiler: gcc-12
test machine: qemu-system-x86_64 -enable-kvm -cpu SandyBridge -smp 2 -m 16G

(please refer to attached dmesg/kmsg for entire log/backtrace)


+------------------------------------------+------------+------------+
|                                          | 92fe9bb77b | 33c7952d92 |
+------------------------------------------+------------+------------+
| boot_successes                           | 7          | 0          |
| boot_failures                            | 0          | 7          |
| general_protection_fault:#[##]           | 0          | 7          |
| EIP:this_cpu_cmpxchg8b_emu               | 0          | 7          |
| Kernel_panic-not_syncing:Fatal_exception | 0          | 7          |
+------------------------------------------+------------+------------+


If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <oliver.sang@xxxxxxxxx>
| Closes: 
https://lore.kernel.org/oe-lkp/202310261417.b269d37e-oliver.sang@xxxxxxxxx


[    0.186570][    T0] stackdepot hash table entries: 65536 (order: 6, 262144 
bytes, linear)
[    0.187499][    T0] Initializing HighMem for node 0 (0002ebfe:000bffe0)
[    1.727965][    T0] Initializing Movable for node 0 (00000000:00000000)
[    1.943274][    T0] Checking if this processor honours the WP bit even in 
supervisor mode...Ok.
[    1.944313][    T0] Memory: 2896220K/3145208K available (16182K kernel code, 
5537K rwdata, 11756K rodata, 816K init, 9720K bss, 248988K reserved, 0K 
cma-reserved, 2379656K highmem)
[    1.947172][    T0] general protection fault: 0000 [#1] PREEMPT
[    1.947900][    T0] CPU: 0 PID: 0 Comm: swapper Not tainted 
6.6.0-rc1-00024-g33c7952d925e #1 8d4b014f9a0a85cc9a3f6a52ed8e88f1e431f74e
[    1.949317][    T0] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), 
BIOS 1.16.2-debian-1.16.2-1 04/01/2014
[ 1.950480][ T0] EIP: this_cpu_cmpxchg8b_emu 
(kbuild/src/consumer/arch/x86/lib/cmpxchg8b_emu.S:73) 
[ 1.951093][ T0] Code: ff ff ff 8d b4 26 00 00 00 00 66 90 83 c6 01 3c 3d 0f 95 
c0 0f b6 c0 83 c0 01 e9 56 ff ff ff bf ff ff ff ff eb a6 cc cc 9c fa <64> 3b 06 
75 13 64 3b 56 04 75 0d 64 89 1e 64 89 4e 04 83 0c 24 40
All code
========
   0:   ff                      (bad)
   1:   ff                      (bad)
   2:   ff 8d b4 26 00 00       decl   0x26b4(%rbp)
   8:   00 00                   add    %al,(%rax)
   a:   66 90                   xchg   %ax,%ax
   c:   83 c6 01                add    $0x1,%esi
   f:   3c 3d                   cmp    $0x3d,%al
  11:   0f 95 c0                setne  %al
  14:   0f b6 c0                movzbl %al,%eax
  17:   83 c0 01                add    $0x1,%eax
  1a:   e9 56 ff ff ff          jmp    0xffffffffffffff75
  1f:   bf ff ff ff ff          mov    $0xffffffff,%edi
  24:   eb a6                   jmp    0xffffffffffffffcc
  26:   cc                      int3
  27:   cc                      int3
  28:   9c                      pushf
  29:   fa                      cli
  2a:*  64 3b 06                cmp    %fs:(%rsi),%eax          <-- trapping 
instruction
  2d:   75 13                   jne    0x42
  2f:   64 3b 56 04             cmp    %fs:0x4(%rsi),%edx
  33:   75 0d                   jne    0x42
  35:   64 89 1e                mov    %ebx,%fs:(%rsi)
  38:   64 89 4e 04             mov    %ecx,%fs:0x4(%rsi)
  3c:   83 0c 24 40             orl    $0x40,(%rsp)

Code starting with the faulting instruction
===========================================
   0:   64 3b 06                cmp    %fs:(%rsi),%eax
   3:   75 13                   jne    0x18
   5:   64 3b 56 04             cmp    %fs:0x4(%rsi),%edx
   9:   75 0d                   jne    0x18
   b:   64 89 1e                mov    %ebx,%fs:(%rsi)
   e:   64 89 4e 04             mov    %ecx,%fs:0x4(%rsi)
  12:   83 0c 24 40             orl    $0x40,(%rsp)
[    1.953397][    T0] EAX: c3c01100 EBX: c3c01180 ECX: 00000004 EDX: 00000003
[    1.954231][    T0] ESI: e52cd090 EDI: e52cd090 EBP: c2b4bf00 ESP: c2b4bec4
[    1.955060][    T0] DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068 EFLAGS: 
00210082
[    1.955949][    T0] CR0: 80050033 CR2: ffdeb000 CR3: 031b5000 CR4: 00000090
[    1.956783][    T0] DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
[    1.957641][    T0] DR6: fffe0ff0 DR7: 00000400
[    1.958190][    T0] Call Trace:
[ 1.958554][ T0] ? show_regs 
(kbuild/src/consumer/arch/x86/kernel/dumpstack.c:479) 
[ 1.959026][ T0] ? die_addr 
(kbuild/src/consumer/arch/x86/kernel/dumpstack.c:421 
kbuild/src/consumer/arch/x86/kernel/dumpstack.c:460) 
[ 1.959480][ T0] ? exc_general_protection 
(kbuild/src/consumer/arch/x86/kernel/traps.c:697 
kbuild/src/consumer/arch/x86/kernel/traps.c:642) 
[ 1.960101][ T0] ? exc_bounds (kbuild/src/consumer/arch/x86/kernel/traps.c:642) 
[ 1.960579][ T0] ? handle_exception 
(kbuild/src/consumer/arch/x86/entry/entry_32.S:1049) 


The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20231026/202310261417.b269d37e-oliver.sang@xxxxxxxxx



-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.