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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v4 3/4] x86: limit issuing of IBPB during context switch
On 18.12.2023 16:19, Roger Pau Monné wrote:
> On Tue, Feb 14, 2023 at 05:11:40PM +0100, Jan Beulich wrote:
>> --- a/xen/arch/x86/domain.c
>> +++ b/xen/arch/x86/domain.c
>> @@ -2005,17 +2005,26 @@ void context_switch(struct vcpu *prev, s
>> }
>> else
>> {
>> + unsigned int feat_sc_rsb = X86_FEATURE_SC_RSB_HVM;
>> +
>> __context_switch();
>>
>> /* Re-enable interrupts before restoring state which may fault. */
>> local_irq_enable();
>>
>> if ( is_pv_domain(nextd) )
>> + {
>> load_segments(next);
>>
>> + feat_sc_rsb = X86_FEATURE_SC_RSB_PV;
>> + }
>> +
>> ctxt_switch_levelling(next);
>>
>> - if ( opt_ibpb_ctxt_switch && !is_idle_domain(nextd) )
>> + if ( opt_ibpb_ctxt_switch && !is_idle_domain(nextd) &&
>> + (!(prevd->arch.spec_ctrl_flags & SCF_entry_ibpb) ||
>> + /* is_idle_domain(prevd) || */
>
> I would rather add a comment to note that the idle domain always has
> SCF_entry_ibpb clear, rather than leaving this commented check in the
> condition.
>
>> + !boot_cpu_has(feat_sc_rsb)) )
Oh, for completeness: For v5 I have this
@@ -2092,17 +2092,26 @@ void context_switch(struct vcpu *prev, s
}
else
{
+ unsigned int feat_sc_rsb = X86_FEATURE_SC_RSB_HVM;
+
__context_switch();
/* Re-enable interrupts before restoring state which may fault. */
local_irq_enable();
if ( is_pv_domain(nextd) )
+ {
load_segments(next);
+ feat_sc_rsb = X86_FEATURE_SC_RSB_PV;
+ }
+
ctxt_switch_levelling(next);
- if ( opt_ibpb_ctxt_switch && !is_idle_domain(nextd) )
+ if ( opt_ibpb_ctxt_switch && !is_idle_domain(nextd) &&
+ (!(prevd->arch.spec_ctrl_flags & SCF_entry_ibpb) ||
+ /* is_idle_domain(prevd) || */
+ (!cpu_has_auto_ibrs && !boot_cpu_has(feat_sc_rsb))) )
{
static DEFINE_PER_CPU(unsigned int, last);
unsigned int *last_id = &this_cpu(last);
i.e. with the cpu_has_auto_ibrs check added.
Jan
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