[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [regression] Re: [PATCH v2 2/2] iommu/vt-d: switch to common RMRR checker
On 13.02.2024 23:37, Andrew Cooper wrote: > On 12/02/2024 2:38 pm, Jan Beulich wrote: >> On 07.02.2024 16:34, Roger Pau Monne wrote: >>> Use the newly introduced generic unity map checker. >>> >>> Also drop the message recommending the usage of iommu_inclusive_mapping: the >>> ranges would end up being mapped anyway even if some of the checks above >>> failed, regardless of whether iommu_inclusive_mapping is set. Plus such >>> option >>> is not supported for PVH, and it's deprecated. >>> >>> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> >> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> > > XenRT says no. > > It's not clear exactly what's going on here, but the latest resync with > staging (covering only today's pushed changes) suffered 4 failures to > boot, on a mix of Intel hardware (SNB, SKL, SKX and CLX). > > All 4 triple-fault-like things where following a log message about an RMRR: > > (XEN) RMRR: [0x0e8 ,0x0e8] is not (entirely) in reserved memory > > not being in reserved memory. > > > First of all - fix this printk() to print full addresses, not frame > numbers. It's obnoxious to cross reference with the E820. Perhaps better indeed. The stray blank before the comma also wants dropping. And while looking over the patch again, "mfn_t addr;" also isn't very helpful - the variable would better be named mfn. > In the example above, 0xe8000 is regular RAM in: > > (XEN) [0000000000000000, 000000000009d3ff] (usable) Well, no, E8000 is outside of that range, and I'm inclined to guess it's the SNB where you saw that. Iirc my SNB has such an RMRR range, too. (Or was it the Westmere?) > In another example, > > (XEN) RMRR: [0x4d800 ,0x4ffff] is not (entirely) in reserved memory > > is a hole between: > > (XEN) [000000004d3ff000, 000000004d3fffff] (usable) > (XEN) [00000000e0000000, 00000000efffffff] (reserved) > > We should also explicitly render holes when printing the E820, because > that's also unnecessarily hard to spot. I disagree here - both "ends" of a hole are easily visible from the neighboring ranges. > It's very likely something in this series, but the link to Intel might > just be chance of which hardware got selected, and I've got no clue why > there's a reset with no further logging out of Xen... I second this - even after looking closely at the patches again, I can't make a connection between them and the observed behavior. Didn't yet look at what, if anything, osstest may have to say. Do I understand correctly that the cited log messages are the last sign of life prior to the systems rebooting? Jan
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