Re: [PATCH v6 02/15] xen/arm: add initial support for LLC coloring on arm64

[Julien Grall <julien@xxxxxxx>]

Hi,

On 14/02/2024 13:52, Carlo Nonato wrote:
> On Wed, Feb 14, 2024 at 11:14 AM Michal Orzel <michal.orzel@xxxxxxx> wrote:
> > > diff --git a/xen/arch/arm/include/asm/processor.h 
> > > b/xen/arch/arm/include/asm/processor.h
> > > index 8e02410465..336933ee62 100644
> > > --- a/xen/arch/arm/include/asm/processor.h
> > > +++ b/xen/arch/arm/include/asm/processor.h
> > > @@ -18,6 +18,22 @@
> > >   #define CTR_IDC_SHIFT       28
> > >   #define CTR_DIC_SHIFT       29
> > >
> > > +/* CCSIDR Current Cache Size ID Register */
> > > +#define CCSIDR_LINESIZE_MASK            _AC(0x7, ULL)
> > Why ULL and not UL? ccsidr is of register_t type
> Julien, while reviewing an earlier version:
>
> > Please use ULL here otherwise someone using MASK << SHIFT will have the
> > expected result.
> https://patchew.org/Xen/20220826125111.152261-1-carlo.nonato@xxxxxxxxxxxxxxx/20220826125111.152261-2-carlo.nonato@xxxxxxxxxxxxxxx/#08956082-c194-8bae-cb25-44e4e3227689@xxxxxxx
Michal is right. This should be UL. Not sure why I suggested ULL back 
then. Sorry.
Cheers,

--
Julien Grall