[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v5 10/23] xen/riscv: introduces acrquire, release and full barriers
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx> --- Changes in V5: - new patch --- xen/arch/riscv/include/asm/fence.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 xen/arch/riscv/include/asm/fence.h diff --git a/xen/arch/riscv/include/asm/fence.h b/xen/arch/riscv/include/asm/fence.h new file mode 100644 index 0000000000..27f46fa897 --- /dev/null +++ b/xen/arch/riscv/include/asm/fence.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef _ASM_RISCV_FENCE_H +#define _ASM_RISCV_FENCE_H + +#define RISCV_ACQUIRE_BARRIER "\tfence r , rw\n" +#define RISCV_RELEASE_BARRIER "\tfence rw, w\n" +#define RISCV_FULL_BARRIER "\tfence rw, rw\n" + +#endif /* _ASM_RISCV_FENCE_H */ -- 2.43.0
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |