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Re: [XEN PATCH 11/11] x86/public: hvm: address violations of MISRA C Rule 20.7
- To: Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Tue, 26 Mar 2024 11:15:49 +0100
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- Delivery-date: Tue, 26 Mar 2024 10:15:56 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 22.03.2024 17:02, Nicola Vetrini wrote:
> MISRA C Rule 20.7 states: "Expressions resulting from the expansion
> of macro parameters shall be enclosed in parentheses". Therefore, some
> macro definitions should gain additional parentheses to ensure that all
> current and future users will be safe with respect to expansions that
> can possibly alter the semantics of the passed-in macro parameter.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
> --- a/xen/include/public/arch-x86/xen.h
> +++ b/xen/include/public/arch-x86/xen.h
> @@ -36,7 +36,7 @@
> #define __XEN_GUEST_HANDLE(name) __guest_handle_ ## name
> #define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
> #define XEN_GUEST_HANDLE_PARAM(name) XEN_GUEST_HANDLE(name)
> -#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = val; } while (0)
> +#define set_xen_guest_handle_raw(hnd, val) do { (hnd).p = (val); } while (0)
> #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
>
> #if defined(__i386__)
Would have been nice though to do the same thing for Arm at the same time.
PPC and RISC-V already have "val" parenthesized there.
Jan
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