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Re: [XEN PATCH v3 00/12] x86: address some violations of MISRA C Rule 16.3
- To: Federico Serafini <federico.serafini@xxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 26 Jun 2024 11:57:17 +0200
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- Cc: consulting@xxxxxxxxxxx, Simone Ballarin <simone.ballarin@xxxxxxxxxxx>, Doug Goldstein <cardoe@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Wed, 26 Jun 2024 09:57:35 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 26.06.2024 11:27, Federico Serafini wrote:
> This patch series fixes a missing escape in a deviation and addresses some
> violations.
>
> Federico Serafini (12):
> automation/eclair: fix deviation of MISRA C Rule 16.3
> x86/cpuid: use fallthrough pseudo keyword
> x86/domctl: address a violation of MISRA C Rule 16.3
> x86/vpmu: address violations of MISRA C Rule 16.3
> x86/traps: address violations of MISRA C Rule 16.3
> x86/mce: address violations of MISRA C Rule 16.3
> x86/hvm: address violations of MISRA C Rule 16.3
Just a remark, no strict request to make further re-arrangements: Looks like
what was patch 11 in v2 was now folded into this patch. Yet then why were
other HVM parts left separate:
> x86/vpt: address a violation of MISRA C Rule 16.3
This and ...
> x86/mm: add defensive return
> x86/mpparse: address a violation of MISRA C Rule 16.3
> x86/vPIC: address a violation of MISRA C Rule 16.3
> x86/vlapic: address a violation of MISRA C Rule 16.3
... these two. In general I'd expect splitting / keeping together to be
done consistently within a series, unless of course there's something that
wants keeping separate for other than purely mechanical reasons.
Jan
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