[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v8 0/7] device tree mapping
On 30.09.2024 10:24, oleksii.kurochko@xxxxxxxxx wrote: > On Mon, 2024-09-30 at 10:17 +0200, Jan Beulich wrote: >> On 27.09.2024 18:33, Oleksii Kurochko wrote: >>> Current patch series introduces device tree mapping for RISC-V >>> and necessary things for that such as: >>> - Fixmap mapping >>> - pmap >>> - Xen page table processing >> >> While nothing is being said here towards a dependency, ... >> >>> --- >>> Changes in v8: >>> - The following patch was merged to staging: >>> [PATCH v5 1/7] xen/riscv: use {read,write}{b,w,l,q}_cpu() to >>> define {read,write}_atomic() >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v7: >>> - Drop the patch "xen/riscv: prevent recursion when ASSERT(), >>> BUG*(), or panic() are called" >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v6: >>> - Add patch to fix recursion when ASSERT(), BUG*(), panic() are >>> called. >>> - Add patch to allow write_atomic() to work with non-scalar types >>> for consistence >>> with read_atomic(). >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v5: >>> - The following patch was merged to staging: >>> [PATCH v3 3/9] xen/riscv: enable CONFIG_HAS_DEVICE_TREE >>> - Drop depedency from "RISCV basic exception handling >>> implementation" as >>> it was meged to staging branch. >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v4: >>> - Drop depedency from common devicre tree patch series as it was >>> merged to >>> staging. >>> - Update the cover letter message. >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v3: >>> - Introduce SBI RFENCE extension support. >>> - Introduce and initialize pcpu_info[] and __cpuid_to_hartid_map[] >>> and functionality >>> to work with this arrays. >>> - Make page table handling arch specific instead of trying to make >>> it generic. >>> - All other changes are patch specific so please look at the >>> patch. >>> --- >>> Changes in v2: >>> - Update the cover letter message >>> - introduce fixmap mapping >>> - introduce pmap >>> - introduce CONFIG_GENREIC_PT >>> - update use early_fdt_map() after MMU is enabled. >>> --- >>> >>> Oleksii Kurochko (7): >>> xen/riscv: allow write_atomic() to work with non-scalar types >>> xen/riscv: set up fixmap mappings >>> xen/riscv: introduce asm/pmap.h header >>> xen/riscv: introduce functionality to work with CPU info >>> xen/riscv: introduce and initialize SBI RFENCE extension >>> xen/riscv: page table handling >>> xen/riscv: introduce early_fdt_map() >>> >>> xen/arch/riscv/Kconfig | 1 + >>> xen/arch/riscv/Makefile | 2 + >>> xen/arch/riscv/include/asm/atomic.h | 11 +- >>> xen/arch/riscv/include/asm/config.h | 16 +- >>> xen/arch/riscv/include/asm/current.h | 27 +- >>> xen/arch/riscv/include/asm/fixmap.h | 46 +++ >>> xen/arch/riscv/include/asm/flushtlb.h | 15 + >>> xen/arch/riscv/include/asm/mm.h | 6 + >>> xen/arch/riscv/include/asm/page.h | 99 +++++ >>> xen/arch/riscv/include/asm/pmap.h | 36 ++ >>> xen/arch/riscv/include/asm/processor.h | 3 - >>> xen/arch/riscv/include/asm/riscv_encoding.h | 2 + >>> xen/arch/riscv/include/asm/sbi.h | 62 +++ >>> xen/arch/riscv/include/asm/smp.h | 18 + >>> xen/arch/riscv/mm.c | 101 ++++- >>> xen/arch/riscv/pt.c | 421 >>> ++++++++++++++++++++ >>> xen/arch/riscv/riscv64/asm-offsets.c | 3 + >>> xen/arch/riscv/riscv64/head.S | 14 + >>> xen/arch/riscv/sbi.c | 273 ++++++++++++- >>> xen/arch/riscv/setup.c | 17 + >> >> ... I had to fiddle with three of the patches touching this file, to >> accommodate for an apparent debugging patch you have in your tree. >> Please can you make sure to submit patches against plain staging, or >> to clearly state dependencies? > I am always trying not to forget to rebase on top of staging for this > patch series: > > 65c49e7aa2 (HEAD -> riscv-dt-support-v8, origin/riscv-dt-support-v8) > xen/riscv: introduce early_fdt_map() > ead52f68ce xen/riscv: page table handling > c3aba0520f xen/riscv: introduce and initialize SBI RFENCE extension > 3ffb3ffd38 xen/riscv: introduce functionality to work with CPU info > 4bfd2bfdb2 xen/riscv: introduce asm/pmap.h header > 87bc91db10 xen/riscv: set up fixmap mappings > 09b925f973 xen/riscv: allow write_atomic() to work with non-scalar > types > 625ee7650c xen/README: add compiler and binutils versions for RISC-V64 > 5379a23ad7 xen/riscv: test basic exception handling stuff > 2b6fb9f3c4 (origin/staging, origin/HEAD, staging) blkif: Fix a couple > of typos > 6e73a16230 blkif: Fix alignment description for discard request > 0111c86bfa x86/boot: Refactor BIOS/PVH start This looks to be a mix of several series. And "xen/riscv: test basic exception handling stuff" looks to be what the problem was with, as that wasn't committed yet (and imo also shouldn't be committed, as expressed before; of course you can try to find someone else to approve it). Jan
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