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Re: [PATCH 4/5] hw/openrisc: Mark devices as big-endian



Am Wed,  6 Nov 2024 18:46:11 +0000
schrieb Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>:

> These devices are only used by the OpenRISC target, which is
> only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
> definition expand to DEVICE_BIG_ENDIAN (besides, the
> DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
> using DEVICE_BIG_ENDIAN.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx>
> ---
>  hw/openrisc/openrisc_sim.c | 2 +-
>  hw/openrisc/virt.c         | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 9fb63515ef..794c175bdb 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -266,7 +266,7 @@ static void openrisc_sim_serial_init(Or1ksimState *state, 
> hwaddr base,
>      }
>      serial_mm_init(get_system_memory(), base, 0, serial_irq, 115200,
>                     serial_hd(OR1KSIM_UART_COUNT - uart_idx - 1),
> -                   DEVICE_NATIVE_ENDIAN);
> +                   DEVICE_BIG_ENDIAN);
>  
>      /* Add device tree node for serial. */
>      nodename = g_strdup_printf("/serial@%" HWADDR_PRIx, base);
> diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
> index 47d2c9bd3c..ede57fe391 100644
> --- a/hw/openrisc/virt.c
> +++ b/hw/openrisc/virt.c
> @@ -236,7 +236,7 @@ static void openrisc_virt_serial_init(OR1KVirtState 
> *state, hwaddr base,
>      qemu_irq serial_irq = get_per_cpu_irq(cpus, num_cpus, irq_pin);
>  
>      serial_mm_init(get_system_memory(), base, 0, serial_irq, 115200,
> -                   serial_hd(0), DEVICE_NATIVE_ENDIAN);
> +                   serial_hd(0), DEVICE_BIG_ENDIAN);
>  
>      /* Add device tree node for serial. */
>      nodename = g_strdup_printf("/serial@%" HWADDR_PRIx, base);

According to https://openrisc.io/or1k.html the openrisc CPU could be
implemented as little endian, too ... so would it make sense to use
a runtime detected value here instead?

 Thomas



 


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