[XEN PATCH v1] x86/APIC: Read Error Status Register correctly

[Javi Merino <javi.merino@xxxxxxxxx>]

The logic to read the APIC_ESR was copied from linux in a commit from
2002: 4676bbf96dc8 (bitkeeper revision
1.2 (3ddb79c9KusG02eh7i-uXkgY0IksKA), 2002-11-20).  In linux 3.14,
this logic was fixed to follow the Intel SDM (see commit
60283df7ac26 (x86/apic: Read Error Status Register correctly,
2014-01-14) in the linux kernel).  The Intel(r) 64 and IA-32
Architectures Software Develover's Manual currently says
in Volume 3, Section 12.5.3:

  Before attempt to read from the ESR, software should first write to
  it. (The value written does not affect the values read subsequently;
  only zero may be written in x2APIC mode.) This write clears any
  previously logged errors and updates the ESR with any errors
  detected since the last write to the ESR. This write also rearms the
  APIC error interrupt triggering mechanism.

Update error_interrupt() to remove the first read and follow the Intel
manual.

Signed-off-by: Javi Merino <javi.merino@xxxxxxxxx>
---
 xen/arch/x86/apic.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index bb86a1c161b3..b4f542d25918 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1385,20 +1385,19 @@ static void cf_check error_interrupt(void)
         ", Illegal register address",
     };
     const char *entries[ARRAY_SIZE(esr_fields)];
-    unsigned int v, v1;
+    unsigned int v;
     unsigned int i;
 
     /* First tickle the hardware, only then report what went on. -- REW */
-    v = apic_read(APIC_ESR);
     apic_write(APIC_ESR, 0);
-    v1 = apic_read(APIC_ESR);
+    v = apic_read(APIC_ESR);
     ack_APIC_irq();
 
     for ( i = 0; i < ARRAY_SIZE(entries); ++i )
-        entries[i] = v1 & (1 << i) ? esr_fields[i] : "";
+        entries[i] = v & (1 << i) ? esr_fields[i] : "";
     printk(XENLOG_DEBUG
-           "APIC error on CPU%u: %02x(%02x)%s%s%s%s%s%s%s%s\n",
-           smp_processor_id(), v, v1,
+           "APIC error on CPU%u: %02x%s%s%s%s%s%s%s%s\n",
+           smp_processor_id(), v,
            entries[7], entries[6], entries[5], entries[4],
            entries[3], entries[2], entries[1], entries[0]);
 }
-- 
2.46.0