[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3 19/24] xen/8250-uart: add missing definitions
On 29.01.2025 02:16, Denis Mukhin wrote: > On Tuesday, January 28th, 2025 at 2:34 PM, Jason Andryuk > <jason.andryuk@xxxxxxx> wrote: > >> >> >> On 2025-01-03 20:58, Denis Mukhin via B4 Relay wrote: >> >>> From: Denis Mukhin dmukhin@xxxxxxxx >>> >>> Added missing definitions needed for NS8250 UART emulator. >>> >>> Re-used newly introduced MSR definitions in the existing ns16550 driver. >>> >>> Also, fixed indentation in a comment for FCR register. >>> >>> Signed-off-by: Denis Mukhin dmukhin@xxxxxxxx >>> --- >>> xen/drivers/char/ns16550.c | 6 ++-- >>> xen/include/xen/8250-uart.h | 78 >>> +++++++++++++++++++++++++++++++++------------ >>> 2 files changed, 60 insertions(+), 24 deletions(-) >> >>> diff --git a/xen/include/xen/8250-uart.h b/xen/include/xen/8250-uart.h >>> index >>> d13352940c13c50bac17d4cdf2f3bf584380776a..6d1af31d582a3dd674a401d7f649e28c889cdc3e >>> 100644 >>> --- a/xen/include/xen/8250-uart.h >>> +++ b/xen/include/xen/8250-uart.h >> >>> @@ -51,12 +54,19 @@ >>> #define UART_IIR_THR 0x02 /* - tx reg. empty / >>> #define UART_IIR_MSI 0x00 / - MODEM status / >>> #define UART_IIR_BSY 0x07 / - busy detect (DW) / >>> +#define UART_IIR_FE 0xC0 / FIFO enabled (2 bits) */ >>> >>> /* FIFO Control Register / >>> -#define UART_FCR_ENABLE 0x01 / enable FIFO / >>> -#define UART_FCR_CLRX 0x02 / clear Rx FIFO / >>> -#define UART_FCR_CLTX 0x04 / clear Tx FIFO / >>> -#define UART_FCR_DMA 0x10 / enter DMA mode */ >> >> >> 0x10 is bit 4... >> >>> +#define UART_FCR_ENABLE BIT(0, U) /* enable FIFO / >>> +#define UART_FCR_CLRX BIT(1, U) / clear Rx FIFO / >>> +#define UART_FCR_CLTX BIT(2, U) / clear Tx FIFO / >>> +#define UART_FCR_DMA BIT(3, U) / enter DMA mode */ >> >> >> Now it's 0x08. Is this a bug fix? Looks like UART_FCR_DMA is unused. > > Correct, NS16550 defines FCR DMA as bit#3 (0x08): > https://www.ti.com/lit/ds/symlink/tl16c550c.pdf > > Table 7-3. Summary of Accessible Registers > 7.7.2 FIFO Control Register (FCR) Any actual corrections you make need mentioning in the description. I'm glad Jason spotted this; I did overlook it. Jan
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