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Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the C code
- To: Ayan Kumar Halder <ayankuma@xxxxxxx>
- From: Luca Fancellu <Luca.Fancellu@xxxxxxx>
- Date: Wed, 9 Apr 2025 10:56:26 +0000
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- Thread-topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the C code
Hi Ayan,
> On 9 Apr 2025, at 11:46, Ayan Kumar Halder <ayankuma@xxxxxxx> wrote:
>
>
> On 09/04/2025 11:21, Luca Fancellu wrote:
>> Hi Ayan,
> Hi,
>>
>>> On 9 Apr 2025, at 11:07, Ayan Kumar Halder <ayankuma@xxxxxxx> wrote:
>>>
>>>
>>> On 09/04/2025 09:26, Luca Fancellu wrote:
>>>> Hi Ayan,
>>> Hi Luca,
>>>>>>> The point of the code was to don’t issue an isb() every time we change
>>>>>>> the selector,
>>>>>>> of course the code would be easier otherwise, but do we want to do that?
>>>>>> Not sure if it is beneficial as you would need to use isb() from
>>>>>> region16 onwards.
>>>>> The isb() is issued only when changing the selector, so when you go from
>>>>> reading/writing regions
>>>>> from 0-15 to 16-31 for example, of course there is a case that if you
>>>>> continuously write on region 15
>>>>> and 16 you would have to always change the selector, but it’s the less
>>>>> impact we could have.
>>>>>
>>>>> armv8-R is even better since it’s able to address regions from 0 to 23
>>>>> without flushing the pipeline,
>>>> ^— aarch32 :)
>>> Can you point me to the document where you got this info ?
>> was referring to the r52, of course you are more knowledgeable on the
>> armv8-r aarch32 part, so ...
> If you can point me to the page and section within R52 TRM, I can take a look
> to see if I missed something (which isn't suprising as the docs are huge :))
Arm® Cortex®-R52 Processor TRM, r1p1, 8.5 MPU Register summary, I can see
HPRBAR going from 0 to 24 (so I was wrong above, there should be 25 regions?).
Anyway we should follow the armv8-r aarch32 specs here as you mentioned before,
so max 32 region. Anyway you are the developer of the arm32 code so I’m
ok with your choices!
Cheers,
Luca
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