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Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
- To: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 30 Apr 2025 08:42:53 +0200
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Dario Faggioli <dfaggioli@xxxxxxxx>, Juergen Gross <jgross@xxxxxxxx>, George Dunlap <gwd@xxxxxxxxxxxxxx>, Julien Grall <julien@xxxxxxx>
- Delivery-date: Wed, 30 Apr 2025 06:43:03 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 30.04.2025 04:17, Volodymyr Babchuk wrote:
> Julien Grall <julien@xxxxxxx> writes:
>>> --- /dev/null
>>> +++ b/xen/arch/arm/include/asm/libafl_qemu_defs.h
>>> @@ -0,0 +1,37 @@
>>
>> Missing license. Also, is this file taken from somewhere?
>>
>
> I add MIT license, as libafl is dual licensed under Apache-2 and
> MIT. This file is based on libafl_qemu [1]
>
>>> +#ifndef LIBAFL_QEMU_DEFS
>>> +#define LIBAFL_QEMU_DEFS
>>> +
>>> +#define LIBAFL_STRINGIFY(s) #s
>>> +#define XSTRINGIFY(s) LIBAFL_STRINGIFY(s)
>>> +
>>> +#if __STDC_VERSION__ >= 201112L
>>> + #define STATIC_CHECKS \
>>> + _Static_assert(sizeof(void *) <= sizeof(libafl_word), \
>>> + "pointer type should not be larger and libafl_word");
>>> +#else
>>> + #define STATIC_CHECKS
>>> +#endif
>>
>> No-one seems to use STATIC_CHECKS? Is this intended?
>
> I used this file as is... But I'll rework this part.
>
>>> +
>>> +#define LIBAFL_SYNC_EXIT_OPCODE 0x66f23a0f
>>> +#define LIBAFL_BACKDOOR_OPCODE 0x44f23a0f
>>
>> Are the opcode valid for arm32? If not, they should be protected with
>> #ifdef CONFIG_ARM_64.
>>
>
> It is valid even for x86_64. They use the same opcode for x86_64, arm,
> aarch64 and riscv.
Wow. On x86-64 they rely on the (prefix-less) opcode 0f3af2 to not gain
any meaning. Somewhat similar on RISC-V, somewhere in MISC_MEM opcode
space. Pretty fragile. Not to speak of what the effect of using such an
opcode is on disassembly of surrounding code (at least for x86).
Jan
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