[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 4/9] x86/mwait-idle: Add Meteorlake support
Add intel_idle support for MeteorLake. C1 and C1E states on Meteorlake are mutually exclusive, like Alderlake and Raptorlake, but they have little latency difference with measureable power difference, so always enable "C1E promotion" bit and expose C1E only. Expose C6 because it has less power compared with C1E, and smaller latency compared with C8/C10. Ignore C8 and expose C10, because C8 does not show latency advantage compared with C10. Signed-off-by: Zhang Rui <rui.zhang@xxxxxxxxx> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git eeae55ed9c0a Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -678,6 +678,28 @@ static struct cpuidle_state __ro_after_i {} }; +static const struct cpuidle_state mtl_l_cstates[] = { + { + .name = "C1E", + .flags = MWAIT2flg(0x01), + .exit_latency = 1, + .target_residency = 1, + }, + { + .name = "C6", + .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 140, + .target_residency = 420, + }, + { + .name = "C10", + .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, + .exit_latency = 310, + .target_residency = 930, + }, + {} +}; + static const struct cpuidle_state gmt_cstates[] = { { .name = "C1", @@ -1117,6 +1139,10 @@ static struct idle_cpu __ro_after_init i .state_table = adl_l_cstates, }; +static const struct idle_cpu idle_cpu_mtl_l = { + .state_table = mtl_l_cstates, +}; + static const struct idle_cpu idle_cpu_gmt = { .state_table = gmt_cstates, }; @@ -1186,6 +1212,7 @@ static const struct x86_cpu_id intel_idl ICPU(ICELAKE_D, icx), ICPU(ALDERLAKE, adl), ICPU(ALDERLAKE_L, adl_l), + ICPU(METEORLAKE_L, mtl_l), ICPU(ATOM_GRACEMONT, gmt), ICPU(SAPPHIRERAPIDS_X, spr), ICPU(EMERALDRAPIDS_X, spr),
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