[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v4 4/8] pdx: allow per-arch optimization of PDX conversion helpers



On Tue, Aug 05, 2025 at 02:11:22PM +0200, Jan Beulich wrote:
> On 05.08.2025 11:52, Roger Pau Monne wrote:
> > There are four performance critical PDX conversion helpers that do the PFN
> > to/from PDX and the physical addresses to/from directmap offsets
> > translations.
> > 
> > In the absence of an active PDX compression, those functions would still do
> > the calculations needed, just to return the same input value as no
> > translation is in place and hence PFN and PDX spaces are identity mapped.
> > 
> > To reduce the overhead of having to do the pointless calculations allow
> > architectures to implement the translation helpers in a per-arch header.
> > Rename the existing conversion functions to add a trailing _xlate suffix,
> > so that the per-arch headers can define the non suffixed versions.
> > 
> > Currently only x86 implements meaningful custom handlers to short circuit
> > the translation when not active, using asm goto.  Other architectures use
> > generic macros that map the non-xlate to the xlate variants to keep the
> > previous behavior.
> > 
> > Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> 
> Once again:
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>

Thanks, I didn't carry your RB due to the changes requested by Andrew,
that was a bit too much to carry a RB after those.

Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.