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Re: [PATCH v3 13/15] x86/cpu/intel: Bound the non-architectural constant_tsc model checks
- To: David Woodhouse <dwmw2@xxxxxxxxxxxxx>, <x86@xxxxxxxxxx>, Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>, Tony Luck <tony.luck@xxxxxxxxx>, Jürgen Gross <jgross@xxxxxxxx>, Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>, xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Sohil Mehta <sohil.mehta@xxxxxxxxx>
- Date: Thu, 21 Aug 2025 12:34:01 -0700
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- Delivery-date: Thu, 21 Aug 2025 19:34:26 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 8/21/2025 6:15 AM, David Woodhouse wrote:
> Hm. My test host is INTEL_HASWELL_X (0x63f). For reasons which are
> unclear to me, QEMU doesn't set bit 8 of 0x80000007 EDX unless I
> explicitly append ',+invtsc' to the existing '-cpu host' on its command
> line. So now my guest doesn't think it has X86_FEATURE_CONSTANT_TSC.
>
Haswell should have X86_FEATURE_CONSTANT_TSC, so I would have expected
the guest bit to be set. Until now, X86_FEATURE_CONSTANT_TSC was set
based on the Family-model instead of the CPUID enumeration which may
have hid the issue.
>From my initial look at the QEMU implementation, this seems intentional.
QEMU considers Invariant TSC as un-migratable which prevents it from
being exposed to migratable guests (default).
target/i386/cpu.c:
[FEAT_8000_0007_EDX]
.unmigratable_flags = CPUID_APM_INVTSC,
Can you please try '-cpu host,migratable=off'?
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