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Re: [PATCH v2 12/16] x86/msr: Change wrmsr() to take a single parameter


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Fri, 22 Aug 2025 08:13:41 +0200
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Fri, 22 Aug 2025 06:13:46 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 21.08.2025 20:47, Andrew Cooper wrote:
> On 19/08/2025 1:38 pm, Jan Beulich wrote:
>> On 15.08.2025 22:41, Andrew Cooper wrote:
>>> --- a/xen/arch/x86/nmi.c
>>> +++ b/xen/arch/x86/nmi.c
>>> @@ -218,16 +218,16 @@ void disable_lapic_nmi_watchdog(void)
>>>          return;
>>>      switch (boot_cpu_data.x86_vendor) {
>>>      case X86_VENDOR_AMD:
>>> -        wrmsr(MSR_K7_EVNTSEL0, 0, 0);
>>> +        wrmsrns(MSR_K7_EVNTSEL0, 0);
>> Since you switch to non-serializing here, ...
>>
>>> @@ -308,11 +308,11 @@ static void setup_k7_watchdog(void)
>>>          | K7_EVNTSEL_USR
>>>          | K7_NMI_EVENT;
>>>  
>>> -    wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
>>> +    wrmsr(MSR_K7_EVNTSEL0, evntsel);
>>>      write_watchdog_counter("K7_PERFCTR0");
>>>      apic_write(APIC_LVTPC, APIC_DM_NMI);
>>>      evntsel |= K7_EVNTSEL_ENABLE;
>>> -    wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
>>> +    wrmsr(MSR_K7_EVNTSEL0, evntsel);
>>>  }
>> ... why not also here?
> 
> An oversight.  Fixed.
> 
>>
>>> --- a/xen/arch/x86/oprofile/op_model_athlon.c
>>> +++ b/xen/arch/x86/oprofile/op_model_athlon.c
>>> @@ -34,7 +34,7 @@
>>>  #define MAX_COUNTERS FAM15H_NUM_COUNTERS
>>>  
>>>  #define CTR_READ(msr_content,msrs,c) do {rdmsrl(msrs->counters[(c)].addr, 
>>> (msr_content));} while (0)
>>> -#define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned 
>>> int)(l), -1);} while (0)
>>> +#define CTR_WRITE(l,msrs,c) do { wrmsr(msrs->counters[(c)].addr, -l); } 
>>> while (0)
>> This isn't obviously correct (as in: no functional change): The macro is,
>> for example, passed reset_value[] contents, which is of type unsigned long.
>> Quite possible that the original code was wrong, though.
> 
> I'm pretty sure the change is correct.
> 
> Perf counters get programmed to -(count), as they generate an interrupt
> when they overflow.  The K8 is the oldest BKDG I can easily access, and
> the counters are 48 bits wide.  The same is true of Intel systems of of
> the same age.
> 
> Interestingly, it is the singular omission from b5103d692aa7 which
> converts everything including the Intel version of CTR_WRITE() of this
> to use wrmsrl().
> 
> While looking at the mail list archives for b5103d692aa7, I found
> https://lists.xenproject.org/archives/html/xen-devel/2010-06/msg01660.html
> which shows that it was Christoph's attempt to turn rdmsr() and wrmsr()
> into a real C functions, so I'm pretty certain that CTR_WRITE() was an
> omission in b5103d692aa7.

Okay, so mainly in need of having the description point out there is actually
a correction of something in here. Then:
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>

Jan



 


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