[RFC PATCH for-4.22 1/2] x86/platform: Expose DTS sensors MSR

["Teddy Astie" <teddy.astie@xxxxxxxxxx>]

Intel provide CPU sensors through "DTS" MSRs. As there MSR are core-specific
(or package-specific), we can't reliably fetch them from Dom0 directly.
Expose these MSR (if supported) through XENPF_resource_op so that it is
accessible through hypercall.

Suggested-by: Jan Beulich <jbeulich@xxxxxxxx>
Signed-off-by: Teddy Astie <teddy.astie@xxxxxxxxxx>
---
I'm not a fan of doing a inline cpuid check here, but I don't have a
better approach in mind.

 xen/arch/x86/include/asm/msr-index.h | 2 ++
 xen/arch/x86/platform_hypercall.c    | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h 
b/xen/arch/x86/include/asm/msr-index.h
index df52587c85..98dda629e5 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -510,6 +510,8 @@
 #define MSR_IA32_THERM_INTERRUPT       0x0000019b
 #define MSR_IA32_THERM_STATUS          0x0000019c
 #define MSR_IA32_MISC_ENABLE           0x000001a0
+#define MSR_IA32_TEMPERATURE_TARGET   0x000001a2
+#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1
 #define MSR_IA32_MISC_ENABLE_FAST_STRING  (1<<0)
 #define MSR_IA32_MISC_ENABLE_PERF_AVAIL   (1<<7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL  (1<<11)
diff --git a/xen/arch/x86/platform_hypercall.c 
b/xen/arch/x86/platform_hypercall.c
index 79bb99e0b6..3190803cc2 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -86,6 +86,12 @@ static bool msr_read_allowed(unsigned int msr)
 
     case MSR_MCU_OPT_CTRL:
         return cpu_has_srbds_ctrl;
+    
+    case MSR_IA32_TEMPERATURE_TARGET:
+    case MSR_IA32_THERM_STATUS:
+    case MSR_IA32_PACKAGE_THERM_STATUS:
+        return boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+            (cpuid_eax(0x6) & 0x1); /* Digital temperature sensor */
     }
 
     if ( ppin_msr && msr == ppin_msr )
-- 
2.51.1



--
Teddy Astie | Vates XCP-ng Developer

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