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Re: [PATCH 1/2] amd/iommu: Always atomically update DTE


  • To: Teddy Astie <teddy.astie@xxxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Thu, 13 Nov 2025 12:35:51 +0100
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Jason Andryuk <jason.andryuk@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Thu, 13 Nov 2025 11:36:09 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 12.11.2025 16:37, Teddy Astie wrote:
> amd_iommu_set_root_page_table chooses between updating atomically
> and non-atomically depending on whether the DTE is active or not.
> 
> This choice existed mostly because cx16 wasn't supposed always available
> until [1]. Thus we don't need to threat the non-atomic path in a special
> way anymore.
> 
> By rearranging slightly the atomic path, we can make it cover all the cases
> which improves the code generation at the expense of systematically performing
> cmpxchg16b.
> 
> Also remove unused raw64 fields of ldte, and the deprecated comment as the
> function actually behaves in a more usual way and can't return >0.
> 
> [1] 2636fcdc15c7 "x86/iommu: check for CMPXCHG16B when enabling IOMMU"
> 
> Signed-off-by: Teddy Astie <teddy.astie@xxxxxxxxxx>
> ---
>  xen/drivers/passthrough/amd/iommu_map.c | 78 ++++++++-----------------
>  1 file changed, 25 insertions(+), 53 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/amd/iommu_map.c 
> b/xen/drivers/passthrough/amd/iommu_map.c
> index 320a2dc64c..e3165d93aa 100644
> --- a/xen/drivers/passthrough/amd/iommu_map.c
> +++ b/xen/drivers/passthrough/amd/iommu_map.c
> @@ -154,69 +154,41 @@ static void set_iommu_ptes_present(unsigned long pt_mfn,
>      unmap_domain_page(table);
>  }
>  
> -/*
> - * This function returns
> - * - -errno for errors,
> - * - 0 for a successful update, atomic when necessary
> - * - 1 for a successful but non-atomic update, which may need to be warned
> - *   about by the caller.
> - */
>  int amd_iommu_set_root_page_table(struct amd_iommu_dte *dte,
>                                    uint64_t root_ptr, uint16_t domain_id,
>                                    uint8_t paging_mode, unsigned int flags)
>  {
>      bool valid = flags & SET_ROOT_VALID;
>  
> -    if ( dte->v && dte->tv )
> -    {
> -        union {
> -            struct amd_iommu_dte dte;
> -            uint64_t raw64[4];
> -            __uint128_t raw128[2];
> -        } ldte = { .dte = *dte };
> -        __uint128_t res, old = ldte.raw128[0];
> -        int ret = 0;
> -
> -        ldte.dte.domain_id = domain_id;
> -        ldte.dte.pt_root = paddr_to_pfn(root_ptr);
> -        ldte.dte.iw = true;
> -        ldte.dte.ir = true;
> -        ldte.dte.paging_mode = paging_mode;
> -        ldte.dte.v = valid;
> -
> -        res = cmpxchg16b(dte, &old, &ldte.raw128[0]);
> -
> -        /*
> -         * Hardware does not update the DTE behind our backs, so the
> -         * return value should match "old".
> -         */
> -        if ( res != old )
> -        {
> -            printk(XENLOG_ERR
> -                   "Dom%d: unexpected DTE %016lx_%016lx (expected 
> %016lx_%016lx)\n",
> -                   domain_id,
> -                   (uint64_t)(res >> 64), (uint64_t)res,
> -                   (uint64_t)(old >> 64), (uint64_t)old);
> -            ret = -EILSEQ;
> -        }
> +    union {
> +        struct amd_iommu_dte dte;
> +        __uint128_t raw128[2];
> +    } ldte = { .dte = *dte };
> +    __uint128_t res, old = ldte.raw128[0];
>  
> -        return ret;
> -    }
> +    ldte.dte.domain_id = domain_id;
> +    ldte.dte.pt_root = paddr_to_pfn(root_ptr);
> +    ldte.dte.iw = true;
> +    ldte.dte.ir = true;
> +    ldte.dte.paging_mode = paging_mode;
> +    ldte.dte.tv = true;
> +    ldte.dte.v = valid;
> +
> +    res = cmpxchg16b(dte, &old, &ldte.raw128[0]);
>  
> -    if ( valid || dte->v )
> +    /*
> +     * Hardware does not update the DTE behind our backs, so the
> +     * return value should match "old".
> +     */
> +    if ( res != old )
>      {
> -        dte->tv = false;
> -        dte->v = true;
> -        smp_wmb();
> +        printk(XENLOG_ERR
> +                "Dom%d: unexpected DTE %016lx_%016lx (expected 
> %016lx_%016lx)\n",
> +                domain_id,
> +                (uint64_t)(res >> 64), (uint64_t)res,
> +                (uint64_t)(old >> 64), (uint64_t)old);

Indentation is now off by 1 here.

> +        return -EILSEQ;

The downside of this is that all updates can now take this path. Yes, this 
shouldn't
be possible to be taken, but it's a (minor) concern nevertheless. At the very 
least
such a downside wants, imo, mentioning in the description, even if for nothing 
else
than to make clear that it was a deliberate choice.

Jan



 


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