[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v2 04/23] xen/arm: vIOMMU: add generic vIOMMU framework


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Milan Djokic <milan_djokic@xxxxxxxx>
  • Date: Thu, 26 Mar 2026 13:52:31 +0100
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aS3sAu/k4Lc1ehYXV1vzfqBBW+7QOEyxPsyXQPrnr/4=; b=yLXhf4r2KqO/aeeU+dL4i/DgdXKWOeP1LqCSSufKizAO3tYUUPGrYO3zz+T+RbBeIIeGKIeXSJ/+rAUifRoNQsQK2f9MRJCDqVeWRl+WN8bFZJFB9bVI4RoOeynk2hnNqhzuHDvh9haW6/UYs/nGkU51kbhNijKzHomfh5+bdmGRMqzOQyxPBPSCgAlrV5cgVdb2DGSAiu5fiFNsxHieXvXklzteZDxFNA5BbD8dbdDedR+3O90N5Gbc3/OpeSjODKLXchM/CkrhKelFe1S8fvShH6PpgTfqm7v1Mn2jRmnSjJUe2evLpEB7l9F7khrPH97eiFQ+hI+GC5w6Yfe1vw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=BL+uEnbNmZTW5vkimSuXlbL6gIoR20d0eWdWyo6d9XOxVB+SCOYYdUkPsK/72gmS6JaYLCRSLZXkqq1hoPYMC1lGw0S+2Syg98RYe1CcmCHwOQzZOrJ3fIYtOwt9iLPCVdJumMb7A3a2OIXDKugeoVbuhbfUSkhsX4oZ8K5BwWBzF5DjcfS01tmjFOCwAqmmZD5zlGHuKRDgAOzdjhY/wmczMfEQxUB9F17MG5bu7ljd/nrqKqT9RwMC+RQNK4e8MtKFc888WsV0fFkGI7ZEZxqA/uYmXSdXCvf8r6et7Ij2DPLPldpJt16ka7Fo014FzQXx3iK3gngiiCJVr9IxWA==
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com;
  • Cc: Rahul Singh <rahul.singh@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Thu, 26 Mar 2026 12:52:47 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

Hello Jan,

On 3/24/26 09:27, Jan Beulich wrote:
On 23.03.2026 23:51, Milan Djokic wrote:
--- a/xen/drivers/passthrough/Kconfig
+++ b/xen/drivers/passthrough/Kconfig
@@ -35,6 +35,11 @@ config IPMMU_VMSA
          (H3 ES3.0, M3-W+, etc) or Gen4 SoCs which IPMMU hardware supports 
stage 2
          translation table format and is able to use CPU's P2M table as is.
+config VIRTUAL_IOMMU
+       bool "Virtual IOMMU Support (UNSUPPORTED)" if UNSUPPORTED
+       help
+        Support virtual IOMMU infrastructure to implement vIOMMU.
+
  endif

This is being added to an Arm-only section, without it having an Arm-only
name. Judging from the diffstat in the cover letter, there's hardly any
abstraction in common code, so likely adding an ARM_ prefix to the name
would be the way to go (for now, i.e. if doing proper abstraction is
specifically not a goal).

Jan

The idea is to reuse (if possible) the generic framework covered by this configuration option for RISC-V in the future. At the moment, most of the implementation resides under the ARM section, since only SMMUv3 hardware is supported. I will add the ARM prefix for now and update the other patches according to the review comments.

BR,
Milan



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.