[PATCH 2/2] x86/fpu: Initialise FTW as well as FCW in xstate_alloc_save_area()

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

xstate_alloc_save_area() configures FCW and MXCSR to #RESET values but misses
FTW.  Fixing this means that the backing memory always has an architecturally
correct value.

Adjust the comment to state that it's the #RESET values which we care about.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Ross Lagerwall <ross.lagerwall@xxxxxxxxxx>

I don't understand what the rest of the comment is trying to say, so have left
it alone.  There's still a lot of cleanup to be done to merge i387 and xstate.
---
 xen/arch/x86/xstate.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index e990abc9d18c..747df0b2e9a9 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -550,11 +550,12 @@ int xstate_alloc_save_area(struct vcpu *v)
         return -ENOMEM;
 
     /*
-     * Set the memory image to default values, but don't force the context
+     * Set the memory image to #RESET values, but don't force the context
      * to be loaded from memory (i.e. keep save_area->xsave_hdr.xstate_bv
      * clear).
      */
     save_area->fpu_sse.fcw = FCW_DEFAULT;
+    save_area->fpu_sse.ftw = FXSAVE_FTW_RESET;
     save_area->fpu_sse.mxcsr = MXCSR_DEFAULT;
 
     v->arch.xsave_area = save_area;
-- 
2.39.5