[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v4 0/4] vpci: allow 32-bit BAR writes with memory decoding enabled


  • To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Stewart Hildebrand <stewart.hildebrand@xxxxxxx>
  • Date: Mon, 6 Apr 2026 15:11:54 -0400
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0)
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=MEBWTYo8FkagdqdlvFbt8pFDDrHaPNw6e1LsgXNGcnU=; b=hyr6xJtUVcpy5GykmHELYJQ1K6+mJvX/cugZdd65A/SOnST+pknqMYeYDA3s0WrOS2bAbbxgl/s1KJtlTcjMxMpwBDQdeEvKyozkIVQxPfec0FMEsoRKCufOpAislrAWrWSmEGXNVy7JQ23BZdaD11cdUVvjcpZoD3VnZo5pPmf04EkRD/5FqydBoY6Qb5glAV/HgOcKtDMMGWSbZRT/hCbkCvdHHI52SYxehyXbfRdb6cRkdZMTa0k+BClguA3/Uc/2SlSozPhXqESrr+ZXC7MYQ+e1NF2LOK36oJIpHGCVNfJiEKQdGKSCEeSJoeL3Sy6GZL5WL9AYujltL4xz0Q==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=rSznalHPByixjzsq9Ww5S04nuq3NClccU0YogrdS0DrX+Yb48X+rKUSXOFKojiMklzwOq30hQH2tMzH3OF1ElO+fDxRPVRy5aPm+evcH9HoBUztj3RqaeO8HAC/vfyBVqFu1ru2X6KKdQufOuUOQSryfVeCujaa1SuJU08cEfURy6K/rqjdOd7zVlLQSdY4bGze5hoI5MoiCgdQ5BEiKMr5L4HRjnYDDVnIsSORWH6+v1SMIEYBZcB33yaJKTRbtfMRINyNOARVgJD2AOxayMXQ4hqtbWJ2emZx8lDbBmpm3eYc5FtC9fu8FZk52gIgKrHXvo+F7YNurC4Ais5xGFA==
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=amd.com header.i="@amd.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
  • Cc: Stewart Hildebrand <stewart.hildebrand@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, "Julien Grall" <julien@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, "Mykyta Poturai" <Mykyta_Poturai@xxxxxxxx>
  • Delivery-date: Mon, 06 Apr 2026 19:12:30 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

These 2 patches
  ("vpci: Use pervcpu ranges for BAR mapping")
  ("vpci: allow queueing of mapping operations")
are also pre-requisites for SR-IOV.

Pipeline: 
https://gitlab.com/xen-project/people/stewarthildebrand/xen/-/pipelines/2432615038

v3->v4:
* switch back to dynamically allocated queue elements

v2->v3:
* add ("vpci: Use pervcpu ranges for BAR mapping")
* rework with fixed array of map/unmap slots

v1->v2:
* new approach with queued p2m operations

RFC->v1:
* rework BAR mapping machinery to support unmap-then-map operation

v3: 
https://lore.kernel.org/xen-devel/20260324030513.700217-1-stewart.hildebrand@xxxxxxx/T/#t
v2: 
https://lore.kernel.org/xen-devel/20250723163744.13095-1-stewart.hildebrand@xxxxxxx/T/#t
v1: 
https://lore.kernel.org/xen-devel/20250531125405.268984-1-stewart.hildebrand@xxxxxxx/T/#t
RFC: 
https://lore.kernel.org/xen-devel/20250312195019.382926-1-stewart.hildebrand@xxxxxxx/T/#t

Mykyta Poturai (1):
  vpci: Use pervcpu ranges for BAR mapping

Stewart Hildebrand (3):
  vpci: allow queueing of mapping operations
  vpci: allow BAR map/unmap without affecting memory decoding bit
  vpci: allow 32-bit BAR writes with memory decoding enabled

 xen/common/domain.c       |   2 +
 xen/drivers/vpci/header.c | 333 ++++++++++++++++++++++++--------------
 xen/drivers/vpci/vpci.c   |  10 +-
 xen/include/xen/vpci.h    |  22 ++-
 4 files changed, 239 insertions(+), 128 deletions(-)


base-commit: 33ceaa28275ca4e298616689ef96f19efaa87c35
-- 
2.53.0




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.