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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v2 1/3] xen/riscv: fix switch_stack_and_jump() for range beyond 1M
The `j` instruction (JAL x0) used in switch_stack_and_jump() is a
J-type instruction with only a ±1MB range, and that this can
be exceeded in some configurations, causing a linker error:
relocation truncated to fit: R_RISCV_JAL against `<symbol>'
Replace `j` with `jr` (JALR x0) via an explicit register, which has
unlimited range.
Found in a downstream branch when UBSAN instrumentation was enabled.
Note that the `tail` instruction looks more natural here, but `jr` is
chosen instead to avoid depending on how the assembler expands `tail`
and which scratch register it uses (`t1` in GAS), which would need to
be listed in the clobber section of `asm volatile`.
Fixes: e66003e7be199 ("xen/riscv: introduce setup_initial_pages")
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
Reviewed-by: Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>
---
Changes in v2:
- Update the commit message and subject
---
xen/arch/riscv/include/asm/current.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/xen/arch/riscv/include/asm/current.h
b/xen/arch/riscv/include/asm/current.h
index 5fbee8182caa..cc004670d18c 100644
--- a/xen/arch/riscv/include/asm/current.h
+++ b/xen/arch/riscv/include/asm/current.h
@@ -51,11 +51,11 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu);
#define vcpu_guest_cpu_user_regs(vcpu) \
(&(vcpu)->arch.cpu_info->guest_cpu_user_regs)
-#define switch_stack_and_jump(stack, fn) do { \
- asm volatile ( \
- "mv sp, %0\n" \
- "j " #fn :: "r" (stack), "X" (fn) : "memory" ); \
- unreachable(); \
+#define switch_stack_and_jump(stack, fn) do { \
+ asm volatile ( \
+ "mv sp, %0\n" \
+ "jr %1" :: "r" (stack), "r" (fn) : "memory" ); \
+ unreachable(); \
} while ( false )
#define get_per_cpu_offset() __per_cpu_offset[smp_processor_id()]
--
2.54.0
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