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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [RFC PATCH v2 15/15] docs: Document support for PCI segment in dbgp and comN parameter
Now that we accept full PCI SBDF (with segments), update the documentation accordingly. Signed-off-by: Teddy Astie <teddy.astie@xxxxxxxxxx> --- In principle, it's correct, but I don't think ECAM is usable at the moment EHCI dbgp is initialized, which would prevent the device from being probed correctly if it's not on segment 0. Same remark for comN. --- docs/misc/xen-command-line.pandoc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 1c711fa980..3b35a1962c 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -349,7 +349,7 @@ ACPI indicating none to be there. ### com1 (x86) ### com2 (x86) -> `= <baud>[/<base-baud>][,[DPS][,[<io-base>|pci|amt][,[<irq>|msi][,[<port-bdf>][,[<bridge-bdf>]]]]]]` +> `= <baud>[/<base-baud>][,[DPS][,[<io-base>|pci|amt][,[<irq>|msi][,[<port-sbdf>][,[<bridge-sbdf>]]]]]]` Both option `com1` and `com2` follow the same format. @@ -371,10 +371,10 @@ Both option `com1` and `com2` follow the same format. registers. * `<irq>` is the IRQ number to use, or `0` to use the UART in poll mode only, or `msi` to set up a Message Signaled Interrupt. -* `<port-bdf>` is the PCI location of the UART, in - `<bus>:<device>.<function>` notation. -* `<bridge-bdf>` is the PCI bridge behind which is the UART, in - `<bus>:<device>.<function>` notation. +* `<port-sbdf>` is the PCI location of the UART, in + `[<seg>:]<bus>:<device>.<function>` notation. +* `<bridge-sbdf>` is the PCI bridge behind which is the UART, in + `[<seg>:]<bus>:<device>.<function>` notation. * `pci` indicates that Xen should scan the PCI bus for the UART, avoiding Intel AMT devices. * `amt` indicated that Xen should scan the PCI bus for the UART, @@ -731,11 +731,11 @@ for the `all` value. If that isn't intended, raise the `sched_credit2_max_cpus_runqueue` value. ### dbgp -> `= ehci[ <integer> | @pci<bus>:<slot>.<func> ]` -> `= xhci[ <integer> | @pci<bus>:<slot>.<func> ][,share=<bool>|hwdom]` +> `= ehci[ <integer> | @pci[<seg>:]<bus>:<slot>.<func> ]` +> `= xhci[ <integer> | @pci[<seg>:]<bus>:<slot>.<func> ][,share=<bool>|hwdom]` Specify the USB controller to use, either by instance number (when going -over the PCI busses sequentially) or by PCI device (must be on segment 0). +over the PCI busses sequentially in segment 0) or by PCI device. Use `ehci` for EHCI debug port, use `xhci` for XHCI debug capability. XHCI driver will wait indefinitely for the debug host to connect - make sure -- 2.54.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech
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