[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH for-4.22?] xen/arm: mask debug exceptions in initial AArch64 guest state
- To: xen-devel@xxxxxxxxxxxxxxxxxxxx
- From: Mykola Kvach <mykola_kvach@xxxxxxxx>
- Date: Fri, 19 Jun 2026 21:37:38 +0300
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=pExjzv71O2OjFeZiCvLguBuONPyYVmPDW24YAYPi3ac=; b=MoGDx224fyodRO/GfnNucb4aiyNSKgwtQAFpbKYeRyshGoJ2ZLB94WDU7ruEHEdFmXhxmqvL5Ru1dqdGwwiYgPGB3r69OyX7SjfMiAK/exJWpra8QOskY4Vg7PBDb8WffM9C/qBwkBXRVA12/sjgUHxOmc9tBP/Z/0gPDcoLcnOK1gkohSaTGzsTRJ3OI8reC6cDJzjp7Egd21VgkBiZ1v/6sLTMZaFwzXEDrZ0arLsU2grPyRvRarY9mAFNWnlypUJ/wmXyVe6E6Wx/26sE2s/I+nkIh4WZPjmDDlYcZ/iLCLOjorlRbEnO8psvPQuNzxeuLpf0JAgBhXzYHVoGag==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Z3lEUtxFur0hB/wqvueqWLNioBat4iLi6Qj/s+dCXMl3798dXg0Qq/B2cnDIrSSdMhDUV+7ICEByx2UV3PCp7BLpqfSj2SHy6/Af/2PzFhdingV+rWhTn3+49//23NKBb9Dnr7Wjcj0DVmu4HgNqugdJ3qwpJArY3eYqAffgJDx1PAlXMhBwgrW7ykzN/f+hfYtS1TWS8Fx1iUpldfpCvMtlU7KiYFgLZTQpszt3fl7UDv70SsRNadJ0OHkENBq8As3e3zMD6JNP/y6L6GYujlUIkcod6wEGkZ6S2oj0bxB98NbCbU209LLTaBAjPvtOGqbUEHdJrcnAbMRbmyTf2w==
- Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com;
- Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
- Delivery-date: Fri, 19 Jun 2026 18:38:11 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
PSR_GUEST64_INIT currently masks SError, IRQ and FIQ, but leaves debug
exceptions unmasked. Both the AArch64 Linux boot protocol and PSCI entry
requirements expect PSTATE.DAIF to be masked.
Add PSR_DBG_MASK to PSR_GUEST64_INIT. This fixes the initial AArch64 guest
entry state as well as virtual PSCI CPU_ON and SYSTEM_SUSPEND resume entry.
Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
---
xen/include/public/arch-arm.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h
index 7d6f87e8b2..00de30b896 100644
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -420,7 +420,8 @@ typedef uint64_t xen_callback_t;
* zImage kernels on aarch32.
*/
#define PSR_GUEST32_INIT
(PSR_Z|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
-#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
+#define PSR_GUEST64_INIT \
+ (PSR_DBG_MASK|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
#define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
--
2.43.0
|
