[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 7/7] x86/kexec: Zero GPRs before entering new kernel
- To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Kevin Lampis <kevin.lampis@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Wed, 24 Jun 2026 08:54:58 +0200
- Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=suse.com header.i="@suse.com" header.h="Content-Transfer-Encoding:In-Reply-To:Autocrypt:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID"
- Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
- Cc: roger.pau@xxxxxxxxxx, ross.lagerwall@xxxxxxxxxx, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Wed, 24 Jun 2026 06:55:08 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 23.06.2026 18:51, Andrew Cooper wrote:
> On 23/06/2026 5:04 pm, Jan Beulich wrote:
>> On 22.06.2026 17:18, Kevin Lampis wrote:
>>> --- a/xen/arch/x86/x86_64/kexec_reloc.S
>>> +++ b/xen/arch/x86/x86_64/kexec_reloc.S
>>> @@ -78,6 +78,20 @@ FUNC(kexec_reloc, PAGE_SIZE)
>>> testq $KEXEC_RELOC_FLAG_COMPAT, %r8
>>> jnz .L_call_32_bit
>>>
>>> + xor %edi, %edi
>>> + xor %eax, %eax
>>> + xor %ebx, %ebx
>>> + xor %ecx, %ecx
>>> + xor %edx, %edx
>>> + xor %r8d, %r8d
>>> + xor %r9d, %r9d
>>> + xor %r10d, %r10d
>>> + xor %r11d, %r11d
>>> + xor %r12d, %r12d
>>> + xor %r13d, %r13d
>>> + xor %r14d, %r14d
>>> + xor %r15d, %r15d
>>> +
>>> /* Jump to the image entry point */
>>> jmp *%rbp
>> Why is %rsi not cleared here? And why is keeping %rbp non-zero okay?
>
> %rsi is the parameter passed in the previous patch.
Ah, I didn't look closely enough there; I merely checked existing code. A
question that arises: What guarantees that in the 32-bit case the value
actually fits in %esi (i.e. the upper half of %rsi is zero)? I can't spot
any check in patch 6.
> Linux used to require the entry address in %rbp. I think relocatable
> configurations can cope without it now, but we don't parse this property
> of the image.
Okay, but the description then better would say why %rbp / %ebp are left
alone.
Jan
|
