RE: [Xen-ia64-devel] SMP-g status.

["Magenheimer, Dan (HP Labs Fort Collins)" <dan.magenheimer@xxxxxx>]

> From: Tristan Gingold [mailto:Tristan.Gingold@xxxxxxxx] 
> Sent: Wednesday, April 26, 2006 1:33 AM
> To: Magenheimer, Dan (HP Labs Fort Collins); 
> xen-ia64-devel@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [Xen-ia64-devel] SMP-g status.
> 
> Le Mardi 25 Avril 2006 18:43, Magenheimer, Dan (HP Labs Fort 
> Collins) a écrit 
> :
> > Wow!  Amazing work, Tristan!
> >
> > Is this a 4-socket "future processor" with 2 cores
> > and 2 threads on each core?
> Yes, 4 montecito with 4 threads.
> 
> >  I wonder if the threading
> > mechanism on this processor differs sufficiently
> > from hyperthreading on x86 that Xen/ia64 might need
> > to deal differently with threads?
> What do you mean by to deal ?

There are many different ways of architecting hyperthreading.
Some may be better suited for one software implementation
than another.  Saying anything further would probably
be inappropriate so would have to wait until chips are
available publicly.

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