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Re: [Xen-users] Slow Windows XP 32-bit

  • To: Peter Milesson <miles@xxxxxxxx>, xen-users <xen-users@xxxxxxxxxxxxx>
  • From: James Harper <james.harper@xxxxxxxxxxxxxxxx>
  • Date: Fri, 27 Sep 2013 11:42:18 +0000
  • Accept-language: en-AU, en-US
  • Delivery-date: Fri, 27 Sep 2013 11:43:31 +0000
  • List-id: Xen user discussion <xen-users.lists.xen.org>
  • Thread-index: AQHOu2IYPupIXQiOG0OEsree9YO1YJnZcXow
  • Thread-topic: [Xen-users] Slow Windows XP 32-bit

> Hi folks,
> Here we go again with the sluggish performance of Windows XP 32-bit
> under Xen 4.3.0. Up till now, I've tested it on AMD hardware, with the
> parameter /PATCHTPR in the boot.ini file of the Windows XP installation.
> It works really great, and Windows XP performance is relly outstanding,
> almost better than on bare metal.
> When I use the parameter /PATCHTPR in the boot.ini of a Windows XP
> installation under Intel hardware, it crashes utterly, almost
> immediately during boot. What I could se from the little information
> that's available, the /PATCHTPR parameter only applies to Windows XP
> 32-bit, and Windows 2000 running under Xen on AMD hardware.
> The Intel Xen installation is almost identical to the one I described in
> my first post a few days ago. It's really annoying and frustrating.
> I would be very grateful for some good advice, how to speed up Windows
> XP 32-bit under Xen in Intel hardware.

So it's definitely just as slow under Intel? For some reason I thought there 
was some inherent speedup available for Intel these days that didn't need any 
TPR patching.

The problem is that 2000, XP, and 2003 (when older than SP2) access the Task 
PRiority register lots, and doing so is very slow. The patchtpr option modifies 
the windows kernel to try and find another way to emulate this without 
requiring an emulation by Xen.

First it checks the CPUID to see if the cpu supports a way to access the TPR 
register via CR8. AMD allows this in 32 bit mode via a MOVE CR0 instruction, 
prefixed with a LOCK. Intel has no such feature.

If that option isn't available, it tries to map the vlapic to memory so it can 
tinker with TPR that way.

If all else fails, it caches any writes to the TPR register and only actually 
writes when it would change the value of TPR. So you get a huge speedup for TPR 
reads, and for any write to TPR that results in the same value being written. 
It's not ideal but it does make a big difference.

I need to know which of the last two is being selected on your system. I 
suspect it will be the method that maps the vlapic. Can you install the debug 
version of the drivers, then send me the output of /var/log/xen/qemu-<domu 
name>.log? There should be some info logged in there about what patching is 
being done. There is a chance that this logging is done too early and you'll 
need to attach a debugger to capture that output, if so let me know and I 
should be able to give you a version that patches later.

If nothing else, I should be able to modify gplpv so that you can select the 
last option and get some improvement, once I figure out what is going on.


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