[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] Re: [XenPPC] Re: IRQs delivery.
On Fri, 2006-03-10 at 11:00 -0600, Olof Johansson wrote: > On Fri, Mar 10, 2006 at 09:30:38AM -0600, Hollis Blanchard wrote: > > On Friday 10 March 2006 04:07, Tristan Gingold wrote: > > > > > > How xen/ppc delivers interrupts ? > > > > Ignoring hypervisors for a moment, the PPC model for external interrupts is > > this: the hardware resets the PC to a fixed entry point (0x500) and changes > > the MSR to put the processor into real (untranslated) mode. (The old PC and > > MSR are saved into a pair of supervisor-only registers, SRR0 and SRR1.) The > > exception handler is then responsible for querying the interrupt > > controller(s) to get the interrupt vector, and then call the appropriate > > driver. > > > > The IBM Research hypervisor (rhype) virtualized the PIC, so that instead of > > querying hardware, the kernel makes an hcall to find the incoming vector. > > If > > the interrupt is not in fact for this domain, the hypervisor queues the > > interrupt for later and tells the current domain "nothing was pending after > > all". Note that in this model, interrupts are delivered by the hardware > > directly to the current domain without hypervisor involvement. > Acutally, rhype handles all 0x500 exceptions directly and then simulates 0x500 exceptions to partitions when they are to actually see an interrupt. Thus if an interrupt occurs for a partition that is not currently running, the partition does not see the exception. PHYP implements it differently; 0x500 exceptions are always seen by the currently running partitions even if the interrupt is not for them. > Not that you have a choice on PPC970, but there's a drawback to this: If > you let all interrupts be delivered directly to the domain, then it can > hold the PIC "hostage" by disabling the delivery (keeping MSR_EE off), > causing interrupts to other domains to be delayed. > PPC970 gives you the choice of where external exceptions are directed to; hypervisor or partition (e.g. do external interrupts turn on MSR.HV?). > Some PPC processors have a feature called "mediated external interrupts", > where they will be delivered to the hypervisor instead, and if the domain > can't service it then (MSR_EE off), the HV can request to be notified > when the domain can take it. The extra code path for re-delivering to a > domain can be made short. > > rHype has some support for this already, but it's unclear which hardware > has it. If I had to guess I would say at least Cell, since those parts > of rhype are ripped out in the sources but some of the infrastructure > is still in there. > rhype interrupt handling code has been design with mediated interrupts in mind. If there are no mediated interrupts certain branches are never taken and certain things become no-ops. -- Michal Ostrowski <mostrows@xxxxxxxxxxxxxx> _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |