[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] page table question!
some issues are still confuesed , Daniel Stodden åé: nested page table ,for the AMD NPT ,is stored in the dom0 linear space, not in the hypervisor virtual address ,is it? or what is the meaning of "that's one major benefit of nested paging: counteraction "address space compression".",and what about the Intel EPT, is it similar ,or how does it work, I am still comfused about the hypervisor' limited virtual address space, it wont be used for storing the EPT or NPT, is it? or what about the hypervisor's virtual address space in the AMD or Intel-vt?how much space is it? or what is tricks behind, could you give me a more detailed explanation about NPT and EPTthen there will not be a small mount of memory consumption for hyperviser's limited VA ,is it? or where are those counterpart page tables stored ?Or do you mean the part of the VM dedicated to the hypervisor? Code running in root mode is running in "host linear" address space, i.e. the nested page table, not the guest's one. Actually, that's one major benefit of nested paging: counteraction "address space compression". another one ,"the guest system takes two levels of translation, while the host(Xen, in this case) takes only one" , what is the meaning? guest does virtual->physical, while physical->machine is translated by xen, is it? what is the tricks, by say, guest takes two levels of translation? Thanks in advance So, the guest system takes two levels of translation, while the host (Xen, in this case) takes only one. Hope this helps. Clarify your question if it doesn't. regards, daniel _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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