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Re: [Xen-devel] vmcs_revision_id: do we care?

The specific situation we are seeing here, I think, is described in the
following Intel Product Change Notification:

It affects Xeon 51xx and 53xx parts, whose steppings change from B-2 or B-3
to G-0, with some accompanying visible changes to feature set.

However, notice that to properly support this mixed-stepping configuration
there is supposed to be a microcode and BIOS update to hide the change
(Customer Impact of Change and Recommended Action). This will presumably
modify CPU behaviour to advertise matching stepping numbers and features.

So, presumably some IBM boxes do not have a suitably modified BIOS and hence
OS software can see the mixed steppings. That's not really a preferred mode
of operation as far as Intel are concerned, I'm pretty sure. The one
sentence in the Intel reference manual referring to mixed VMCS version
numbers doesn't convince me otherwise!

Looking at e.g., 
?lndocid=MIGR-64501&brandind=5000008 there's no mention in the BIOS revision
history that support for B/G mixed steppings has been fixed. :-(

 -- Keir

On 9/1/08 16:13, "Daniel Li" <dli@xxxxxxxxxxxxxxx> wrote:

> Based on what I've heard, both IBM and Intel have been telling people
> this configuration is valid.  From what I was able to dig out, Intel in
> their System Programming Guide: Virtual Machine Monitor Programming
> Considerations, published Nov. 2007, suggested when loading a VMCS onto
> a processor with a different vmcs_revision_id, instead of using VMPTRLD,
> one should use VMREAD to read out each field then use VMWRITE to write
> them back. Is that more or less  the kind of work we are facing here? Or
> is there more?
> Thanks,
> Dan
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@xxxxxxxxxxxxxxxxxxx
> http://lists.xensource.com/xen-devel

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