[Xen-devel] Re: [PATCH] [RFC] More fp instructions for realmode emulation (Enables booting OS/2 as a HVM guest on Intel/VT hardware)

[Andi Kleen <andi@xxxxxxxxxxxxxx>]

> We don't trust FXRSTOR but we do trust FXSAVE. The AMD manual says that
> FXRSTOR will #GP if 1s are written to MXCSR reserved bits, but I take this
> to be a cut-and-paste typo since FXSAVE does not write to MXCSR.
> 
> If there's real evidence of FXSAVE causing #GP dependent on current FPU
> state, I'd be very happy to find out about it!

Sorry, double checked now the Intel docs. First I admit I don't 
quite remember why it was originally done in Linux, but they
both use exception handlers.

The Intel docs say that #MF can happen for a pending FPU exception
in 64bit mode.

-Andi

_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel