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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH]ia64: Enhance vt-d support for ia64.
This patch targets for enhancing vt-d support for ia64.
1. reserve enough memory for building dom0 vt-d page table.
2. build 1:1 vt-d page table according to system's mem map.
3. enable vt-d interrupt support for ia64.
Signed-off-by: Xiantao Zhang <xiantao.zhang@xxxxxxxxx>
Acked-by: Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
diff -r 09a6fa059b37 xen/arch/ia64/xen/domain.c
--- a/xen/arch/ia64/xen/domain.c Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/arch/ia64/xen/domain.c Tue Feb 17 11:28:57 2009 +0800
@@ -2029,6 +2029,7 @@ static void __init calc_dom0_size(void)
unsigned long p2m_pages;
unsigned long spare_hv_pages;
unsigned long max_dom0_size;
+ unsigned long iommu_pg_table_pages = 0;
/* Estimate maximum memory we can safely allocate for dom0
* by subtracting the p2m table allocation and a chunk of memory
@@ -2039,8 +2040,13 @@ static void __init calc_dom0_size(void)
domheap_pages = avail_domheap_pages();
p2m_pages = domheap_pages / PTRS_PER_PTE;
spare_hv_pages = 8192 + (domheap_pages / 4096);
- max_dom0_size = (domheap_pages - (p2m_pages + spare_hv_pages))
- * PAGE_SIZE;
+
+ if (iommu_enabled)
+ iommu_pg_table_pages = domheap_pages * 4 / 512;
+ /* There are 512 ptes in one 4K vtd page. */
+
+ max_dom0_size = (domheap_pages - (p2m_pages + spare_hv_pages) -
+ iommu_pg_table_pages) * PAGE_SIZE;
printk("Maximum permitted dom0 size: %luMB\n",
max_dom0_size / (1024*1024));
diff -r 09a6fa059b37 xen/drivers/passthrough/vtd/ia64/vtd.c
--- a/xen/drivers/passthrough/vtd/ia64/vtd.c Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/drivers/passthrough/vtd/ia64/vtd.c Tue Feb 17 11:28:57 2009 +0800
@@ -114,3 +114,33 @@ void hvm_dpci_isairq_eoi(struct domain *
{
/* dummy */
}
+
+static int do_dom0_iommu_mapping(unsigned long start, unsigned long end,
+ void *arg)
+{
+ unsigned long tmp, pfn, j, page_addr = start;
+ struct domain *d = (struct domain *)arg;
+
+ extern int xen_in_range(paddr_t start, paddr_t end);
+ /* Set up 1:1 page table for dom0 for all Ram except Xen bits.*/
+
+ while (page_addr < end)
+ {
+ if (xen_in_range(page_addr, page_addr + PAGE_SIZE))
+ continue;
+
+ pfn = page_addr >> PAGE_SHIFT;
+ tmp = 1 << (PAGE_SHIFT - PAGE_SHIFT_4K);
+ for ( j = 0; j < tmp; j++ )
+ iommu_map_page(d, (pfn*tmp+j), (pfn*tmp+j));
+
+ page_addr += PAGE_SIZE;
+ }
+ return 0;
+}
+
+void iommu_set_dom0_mapping(struct domain *d)
+{
+ BUG_ON(d != dom0);
+ efi_memmap_walk(do_dom0_iommu_mapping, d);
+}
diff -r 09a6fa059b37 xen/drivers/passthrough/vtd/iommu.c
--- a/xen/drivers/passthrough/vtd/iommu.c Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/drivers/passthrough/vtd/iommu.c Tue Feb 17 11:28:57 2009 +0800
@@ -30,6 +30,7 @@
#include <xen/pci.h>
#include <xen/pci_regs.h>
#include <xen/keyhandler.h>
+#include <asm/msi.h>
#include "iommu.h"
#include "dmar.h"
#include "extern.h"
@@ -829,7 +830,6 @@ static void dma_msi_data_init(struct iom
spin_unlock_irqrestore(&iommu->register_lock, flags);
}
-#ifdef SUPPORT_MSI_REMAPPING
static void dma_msi_addr_init(struct iommu *iommu, int phy_cpu)
{
u64 msi_address;
@@ -846,12 +846,6 @@ static void dma_msi_addr_init(struct iom
dmar_writel(iommu->reg, DMAR_FEUADDR_REG, (u32)(msi_address >> 32));
spin_unlock_irqrestore(&iommu->register_lock, flags);
}
-#else
-static void dma_msi_addr_init(struct iommu *iommu, int phy_cpu)
-{
- /* ia64: TODO */
-}
-#endif
static void dma_msi_set_affinity(unsigned int vector, cpumask_t dest)
{
@@ -988,7 +982,6 @@ static int intel_iommu_domain_init(struc
{
struct hvm_iommu *hd = domain_hvm_iommu(d);
struct iommu *iommu = NULL;
- u64 i, j, tmp;
struct acpi_drhd_unit *drhd;
drhd = list_entry(acpi_drhd_units.next, typeof(*drhd), list);
@@ -1000,17 +993,8 @@ static int intel_iommu_domain_init(struc
{
extern int xen_in_range(paddr_t start, paddr_t end);
- /* Set up 1:1 page table for dom0 for all RAM except Xen bits. */
- for ( i = 0; i < max_page; i++ )
- {
- if ( !page_is_conventional_ram(i) ||
- xen_in_range(i << PAGE_SHIFT, (i + 1) << PAGE_SHIFT) )
- continue;
-
- tmp = 1 << (PAGE_SHIFT - PAGE_SHIFT_4K);
- for ( j = 0; j < tmp; j++ )
- iommu_map_page(d, (i*tmp+j), (i*tmp+j));
- }
+ /* Set up 1:1 page table for dom0 */
+ iommu_set_dom0_mapping(d);
setup_dom0_devices(d);
setup_dom0_rmrr(d);
diff -r 09a6fa059b37 xen/drivers/passthrough/vtd/x86/vtd.c
--- a/xen/drivers/passthrough/vtd/x86/vtd.c Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/drivers/passthrough/vtd/x86/vtd.c Tue Feb 17 11:28:57 2009 +0800
@@ -143,3 +143,23 @@ void hvm_dpci_isairq_eoi(struct domain *
}
spin_unlock(&d->event_lock);
}
+
+void iommu_set_dom0_mapping(struct domain *d)
+{
+ u64 i, j, tmp;
+ extern int xen_in_range(paddr_t start, paddr_t end);
+
+ BUG_ON(d != dom0);
+
+ for ( i = 0; i < max_page; i++ )
+ {
+ /* Set up 1:1 mapping for dom0 for all RAM except Xen bits. */
+ if ( !page_is_conventional_ram(i) ||
+ xen_in_range(i << PAGE_SHIFT, (i + 1) << PAGE_SHIFT) )
+ continue;
+
+ tmp = 1 << (PAGE_SHIFT - PAGE_SHIFT_4K);
+ for ( j = 0; j < tmp; j++ )
+ iommu_map_page(d, (i*tmp+j), (i*tmp+j));
+ }
+}
diff -r 09a6fa059b37 xen/include/asm-ia64/hvm/iommu.h
--- a/xen/include/asm-ia64/hvm/iommu.h Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/include/asm-ia64/hvm/iommu.h Tue Feb 17 11:28:57 2009 +0800
@@ -5,6 +5,7 @@
#include <public/event_channel.h>
#include <public/arch-ia64/hvm/save.h>
#include <asm/linux-xen/asm/iosapic.h>
+#include <asm/hw_irq.h>
struct iommu_ops;
extern struct iommu_ops intel_iommu_ops;
diff -r 09a6fa059b37 xen/include/xen/iommu.h
--- a/xen/include/xen/iommu.h Fri Feb 13 09:48:56 2009 +0000
+++ b/xen/include/xen/iommu.h Tue Feb 17 11:28:57 2009 +0800
@@ -114,4 +114,6 @@ void iommu_suspend(void);
void iommu_suspend(void);
void iommu_resume(void);
+void iommu_set_dom0_mapping(struct domain *d);
+
#endif /* _IOMMU_H_ */Attachment:
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