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Re: [Xen-devel] GPU passthrough issue when VM is configured with 4G memory




Thanks,
-Xudong


> -----Original Message-----
> From: Stefano Stabellini [mailto:stefano.stabellini@xxxxxxxxxxxxx]
> Sent: Monday, March 18, 2013 8:02 PM
> To: Hanweidong
> Cc: George Dunlap; Stefano Stabellini; Yanqiangjun; Luonengjun; Wangzhenguo;
> Yangxiaowei; Gonglei (Arei); Anthony Perard; xen-devel@xxxxxxxxxxxxx; Hao,
> Xudong; Zhang, Xiantao
> Subject: RE: [Xen-devel] GPU passthrough issue when VM is configured with 4G
> memory
> 
> On Wed, 13 Mar 2013, Hanweidong wrote:
> > MMIO HOLE was adjusted to e0000000 - fc000000. But QEMU uses below
> code to init
> > RAM in xen_ram_init:
> >
> >     ...
> >     block_len = ram_size;
> >     if (ram_size >= HVM_BELOW_4G_RAM_END) {
> >         /* Xen does not allocate the memory continuously, and keep a hole
> at
> >          * HVM_BELOW_4G_MMIO_START of
> HVM_BELOW_4G_MMIO_LENGTH
> >          */
> >         block_len += HVM_BELOW_4G_MMIO_LENGTH;
> >     }
> >     memory_region_init_ram(&ram_memory, "xen.ram", block_len);
> >     vmstate_register_ram_global(&ram_memory);
> >
> >     if (ram_size >= HVM_BELOW_4G_RAM_END) {
> >         above_4g_mem_size = ram_size - HVM_BELOW_4G_RAM_END;
> >         below_4g_mem_size = HVM_BELOW_4G_RAM_END;
> >     } else {
> >         below_4g_mem_size = ram_size;
> >     }
> >     ...
> >
> > HVM_BELOW_4G_RAM_END is f0000000. If we change
> HVM_BELOW_4G_RAM_END to e0000000,
> > Which it's consistent with hvmloader when assigning a GPU, and then guest
> worked
> > for us. So we wondering that xen_ram_init in QEMU should be consistent
> with
> > hvmloader.
> >
> > In addition, we found QEMU uses hardcode 0xe0000000 in pc_init1() as
> below.
> > Should keep these places handle the consistent mmio hole or not?
> >
> >     if (ram_size >= 0xe0000000 ) {
> >         above_4g_mem_size = ram_size - 0xe0000000;
> >         below_4g_mem_size = 0xe0000000;
> >     } else {
> >         above_4g_mem_size = 0;
> >         below_4g_mem_size = ram_size;
> >     }
> 
> The guys at Intel sent a couple of patches recently to fix this issue:
> 
> http://marc.info/?l=xen-devel&m=136150317011027
> http://marc.info/?l=qemu-devel&m=136177475215360&w=2
> 
> Do they solve your problem?
> 
> Xudong and Xiantao,
> are you going to send an update of the second patch to QEMU?

Hi, Stefano

We'd like to send an update of second patch(implement this register as a 
write-only one). However, we have other priority things if it must be implement 
by xenbus, so how do you think?

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