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Re: [Xen-devel] [edk2] Passing Xen memory map and resource map to OVMF

On Nov 14, 2013, at 3:06 AM, Laszlo Ersek <lersek@xxxxxxxxxx> wrote:

> On 11/14/13 08:58, Gerd Hoffmann wrote:
>>  Hi,
>>>>> OVMF
>>>>> should just use whatever it gets.
>>>> What would OVMF use them for?
>>> To reserve range for MMIO holes, so that later PCI resource
>>> allocation protocol can only use those ranges.
>> I'm still not convinced you need that in the first place.
>> When booting seabios @ xen it is not needed.  pci ressource allocation
>> is handled by hvmloader.  apci tables (and the ressources declared
>> therein) are handled by hvmloader.  seabios doesn't touch the pci bars
>> and passes through the apci tables -> guest os is happy.
>> So why ovmf should be different?   IMHO it should operate like seabios
>> and NOT do pci ressource allocation when running on xen.  Ressources
>> are already handled already by hvmloader.  Doing it again is (a)
>> pointless and (b) creates problems like the one we are discussion
>> right now.
> The PEI (Pre-EFI Initialization) phase in UEFI has to produce a series
> of hand-off blocks (HOBs) that describe a bunch of things for the later
> phases of UEFI. One such set of information is the memory map used eg.
> by the memory management functions called from drivers and applications.
> ACPI tables are not enough.
> So, these HOBs in PEI must come from somewhere. (Platform initialization
> is officially platform-specific, so if on your platform ACPI tables come
> to existence first, at some location in memory, you can key off those
> when exporting the HOBs.)

Assuming the info you need is in static ACPI tables. I thought the abstraction 
of PCI in ACPI was via a root bridge method and you need a full blown 
interpreter to read it. There is an Open Source ACPI interpreter, from Intel, 
but it seems like overkill. From a standards point of view we have gotten 
requests in the past from OS vendors to expose some information that was in the 
ACPI name space as it was need before the OS ACPI interpreter would be 

Also assuming everything is behind PCI that has been enumerated seems like a 
very PC centric view of the world. A lot of ARM SoC devices don’t have PCI, but 
just memory mapped registers. Hiding everything behind PCI is a PC trick to 
make Windows work. So for generic hardware some kind of table that describes 
the memory map seems useful. 

> The memmap-related HOBs we currently export in
> "OvmfPkg/PlatformPei/Platform.c" are basically static, they only depend
> on the memory size retrieved from the CMOS. I can imagine that more
> flexibility is needed.
> Also, PCI resource allocation (enumeration etc.) is just part of the PCI
> bus driver in UEFI. Sometime earlier I wrote
>> The MMIO range is allocated like this:
>> PciEnumerator()                                                   
>> [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c]
>>  PciHostBridgeResourceAllocator()                                
>> [MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c]
>>    NotifyPhase (PciResAlloc, EfiPciHostBridgeAllocateResources)  
>> [MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c]
>>      NotifyPhase()                                               
>> [PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c]
>>        CoreAllocateMemorySpace()                                 
>> [MdeModulePkg/Core/Dxe/Gcd/Gcd.c]
>>          CoreAllocateSpace()

The PI Spec. GCD (Global Coherency Domain) services manage address space. So 
some chunk of address space needs to be allocated to system memory, to PCI 
config space, to PCI MMIO space ect. 

>> The memory map base comes from CoreInitializeGcdServices() /
>> MemMapInitialization().
> The MemMapInitialization() function (in
> "OvmfPkg/PlatformPei/Platform.c") mentioned in the quote is what we're
> discussing now, that's what produces those early HOBs.
> (Corrections welcome to whatever I said in this email.)

From a UEFI spec perspective you only need to produce 
all that is required to make generic UEFI code (all the PCI drivers, shell 
commands, etc.) work. 

driver assumes you are following the PI Spec model and a full PCI enumeration 
is requires and a set of chipset/platform specific protocols are provided to 
make the PCI enumerate code generic. 

There are other examples in the edk2 where PCI enumeration is not required:
1) DUET, as the PCI enumeration has already been done. You can see in 
https://svn.code.sf.net/p/edk2/code/trunk/edk2/DuetPkg/DuetPkgX64.dsc that the 
UEFI required protocols for PCI are implemented in 
DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf and 
2) The BeagleBoard does not have PCI, but it produces a fake set of PCI 
interfaces to reuse some of the EFI PCI drivers. See 

Hope this helps,

Andrew Fish

> Thanks
> Laszlo
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