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Re: [Xen-devel] Multi-bridged PCIe devices (Was: Re: iommuu/vt-d issues with LSI MegaSAS (PERC5i))
>>> On 07.01.14 at 15:38, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> wrote:
> That requires knowing the MMIO BARs the 'fake' device has, and
> .. well, whatever else the Intel VT-d code requires.
Why would you need to know BAR values? Weren't we talking of
an invisible bridge (in which case one would expect that there's
no MSI-X interrupts to be used, which is the only reason I can
see us needing to know/read the BARs)?
Jan
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