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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH V4.1] mcheck, vmce: Allow vmce_amd_* functions to handle AMD thresolding MSRs
>>> On 13.02.14 at 00:26, Aravind Gopalakrishnan
>>> <aravind.gopalakrishnan@xxxxxxx> wrote:
> --- a/xen/arch/x86/cpu/mcheck/vmce.c
> +++ b/xen/arch/x86/cpu/mcheck/vmce.c
> @@ -107,7 +107,8 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t
> msr, uint64_t *val)
>
> *val = 0;
>
> - switch ( msr & (MSR_IA32_MC0_CTL | 3) )
> + /* Allow only first 3 MC banks into switch() */
> + switch ( msr & (-MSR_IA32_MC0_CTL | 3) )
> {
> case MSR_IA32_MC0_CTL:
> /* stick all 1's to MCi_CTL */
I'm confused: You now add a comment as if the mask was including
bit 4, which it doesn't. What am I missing?
Also, please get used to mention (commonly at the bottom of the
commit message, after a --- separator) what changed compared to
the previous iteration.
Jan
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