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Re: [Xen-devel] [PATCH v2 2/3] x86/AMD: support further feature masking MSRs

>>> On 09.04.14 at 17:39, <aravind.gopalakrishnan@xxxxxxx> wrote:
> Hmm. Boris is right.. All BKDG's I can refer to also say cpuid[7,0].eax 
> is reserved.
> So, we should be OK with allowing user to mask only cpuid[7,0].ebx ?

You have an MSR to mask eax output here, yet you don't know what
this register is going to be used for? Unless there's a reasonable level
of certainty that you'll intentionally break compatibility with Intel here,
I think we're well advised to treat the register the way Intel specifies
it. (Furthermore, as long as it's reserved, it's going to return 0 from
hardware only anyway, and hence we'd limit masked output to 0 - no
problem at all.)


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