[Xen-devel] [PATCH] xen/arm: Restricted access to IFSR32_EL2 and FPEXC32_EL2

[vijay.kilari@xxxxxxxxx]

From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>

Some platforms does not support aarch32 mode. So access only if
platform supports it. Accessing these registers will
raise exception

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
---
 xen/arch/arm/arm64/vfp.c |    6 ++++--
 xen/arch/arm/traps.c     |    7 +++++--
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/xen/arch/arm/arm64/vfp.c b/xen/arch/arm/arm64/vfp.c
index 3cd2b1b..c550a68 100644
--- a/xen/arch/arm/arm64/vfp.c
+++ b/xen/arch/arm/arm64/vfp.c
@@ -28,7 +28,8 @@ void vfp_save_state(struct vcpu *v)
 
     v->arch.vfp.fpsr = READ_SYSREG32(FPSR);
     v->arch.vfp.fpcr = READ_SYSREG32(FPCR);
-    v->arch.vfp.fpexc32_el2 = READ_SYSREG32(FPEXC32_EL2);
+    if ( cpu_has_el2_32 )
+        v->arch.vfp.fpexc32_el2 = READ_SYSREG32(FPEXC32_EL2);
 }
 
 void vfp_restore_state(struct vcpu *v)
@@ -56,5 +57,6 @@ void vfp_restore_state(struct vcpu *v)
 
     WRITE_SYSREG32(v->arch.vfp.fpsr, FPSR);
     WRITE_SYSREG32(v->arch.vfp.fpcr, FPCR);
-    WRITE_SYSREG32(v->arch.vfp.fpexc32_el2, FPEXC32_EL2);
+    if ( cpu_has_el2_32 )
+        WRITE_SYSREG32(v->arch.vfp.fpexc32_el2, FPEXC32_EL2);
 }
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 1ac01ee..d2748d9 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -37,6 +37,7 @@
 #include <asm/cpregs.h>
 #include <asm/psci.h>
 #include <asm/mmio.h>
+#include <asm/cpufeature.h>
 
 #include "decode.h"
 #include "vtimer.h"
@@ -364,7 +365,8 @@ static void inject_abt32_exception(struct cpu_user_regs 
*regs,
         register_t far = READ_SYSREG(FAR_EL1) & 0xffffffffUL;
         far |= addr << 32;
         WRITE_SYSREG(far, FAR_EL1);
-        WRITE_SYSREG(fsr, IFSR32_EL2);
+        if ( cpu_has_el2_32 )
+            WRITE_SYSREG(fsr, IFSR32_EL2);
 
 #endif
     }
@@ -756,7 +758,8 @@ void show_registers(struct cpu_user_regs *regs)
 #else
     ctxt.far = READ_SYSREG(FAR_EL1);
     ctxt.esr_el1 = READ_SYSREG(ESR_EL1);
-    ctxt.ifsr32_el2 = READ_SYSREG(IFSR32_EL2);
+    if ( cpu_has_el2_32 )
+        ctxt.ifsr32_el2 = READ_SYSREG(IFSR32_EL2);
 #endif
     ctxt.vttbr_el2 = READ_SYSREG64(VTTBR_EL2);
 
-- 
1.7.9.5


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