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Re: [Xen-devel] [PATCH 5/6] xen: arm: add some helpers for assessing p2m pte



On 06/10/2014 01:29 PM, Ian Campbell wrote:
> On Tue, 2014-06-10 at 12:54 +0100, Julien Grall wrote:
>> On 06/10/2014 12:46 PM, Ian Campbell wrote:
>>> On Tue, 2014-06-10 at 12:37 +0100, Julien Grall wrote:
>>>> On 06/10/2014 10:57 AM, Ian Campbell wrote:
>>>>>      mask = SECOND_MASK;
>>>>>      second = map_domain_page(pte.p2m.base);
>>>>>      pte = second[second_table_offset(paddr)];
>>>>> -    if ( !pte.p2m.valid || !pte.p2m.table )
>>>>> +    if ( !p2m_table(pte) )
>>>>>          goto done;
>>>>>  
>>>>>      mask = THIRD_MASK;
>>>>> @@ -156,11 +161,11 @@ paddr_t p2m_lookup(struct domain *d, paddr_t paddr, 
>>>>> p2m_type_t *t)
>>>>>      pte = third[third_table_offset(paddr)];
>>>>>  
>>>>>      /* This bit must be one in the level 3 entry */
>>>>> -    if ( !pte.p2m.table )
>>>>> +    if ( !p2m_table(pte) )
>>>>>          pte.bits = 0;
>>>>>  
>>>>>  done:
>>>>> -    if ( pte.p2m.valid )
>>>>> +    if ( p2m_valid(pte) )
>>>>
>>>> Regardless the current check, I think this should be p2m_entry(pte) to
>>>> help code comprehension.
>>>>
>>>> Indeed, the can only get the address if the pte is pointed to a memory
>>>> block.
>>>
>>> Yes, but an L3 PTE has the table bit set, which would make
>>> p2m_entry(pte) false...
>>
>> Hmmm... right. But this bit (ie table bit) doesn't have the same meaning
>> on L3. Your comment on p2m_table is confusing.
> 
> You mean: /* Remember: L3 entries set the table bit! */ ?
> 
> That was intended to be a comment on the two helpers which follow. Do
> you have an idea how I could make it clearer? Perhaps appending "So
> these two functions will return the opposite to what you expect for L3
> ptes"?

I was thinking something like "These two functions are only valid for L1
and L2 ptes".

-- 
Julien Grall

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