Re: [Xen-devel] [PATCH v10 03/10] xen/arm: inflight irqs during migration

[Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>]

On Tue, 5 Aug 2014, Julien Grall wrote:
> Hi Stefano,
> 
> On 08/05/2014 12:26 PM, Stefano Stabellini wrote:
> > We need to take special care when migrating irqs that are already
> > inflight from one vcpu to another. See "The effect of changes to an
> > GICD_ITARGETSR", part of chapter 4.3.12 of the ARM Generic Interrupt
> > Controller Architecture Specification.
> 
> NIT: Can you give the reference of the book? ie: IHI 0048B
> 
> [..]
> 
> > +        i = 0;
> > +        while ( (i = find_next_bit(&target, 32, i)) < 32 )
> > +        {
> > +            unsigned int irq, new_target, old_target;
> > +            unsigned long old_target_mask;
> > +            struct vcpu *v_target, *v_old;
> > +
> > +            new_target = i % 8;
> > +            old_target_mask = 
> > vgic_byte_read(rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR, 
> > DABT_WORD)], 0, i/8);
> 
> Can you try to split this line?
> 
> > +            old_target = find_first_bit(&old_target_mask, 8);
> > +
> > +            if ( new_target != old_target )
> > +            {
> > +                irq = gicd_reg + (i / 8);
> 
> gicd_reg contains the register offset (i.e GICD_ITARGETSR + off). How
> can you get the correct IRQ number here?
> 
> I think this should be
> 
> irq = gicd_reg - GICD_ITARGETSR + (i / 8);

You are right. I have no idea how I didn't spot it before.

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