Re: [Xen-devel] [PATCH v4 3/4] amd-iommu: disable iommu_hap_pt_share with AMD IOMMUs

[Suravee Suthikulanit <suravee.suthikulpanit@xxxxxxx>]

On 7/22/2014 12:39 PM, Roger Pau Monnà wrote:
> On 22/07/14 19:30, Suravee Suthikulpanit wrote:
> > Roger,
> >
> > I am not quite sure why you would disable "iommu_hap_pt_share" for AMD
> > IOMMU. The current implementation assumes that the p2m can be shared.
> >
> > Also, I feel that simply just set iommu_hap_pt_share = 0 (while still
> > having several places in the AMD iommu drivers and p2m-pt.c assuming
> > that it can be shared) seems a bit messy.
> According to the comment in p2m.h, AMD IOMMU only supports bit 52 to bit
> 58 in the pte to be 0, otherwise the hw generates page faults.
>
> If we want to support doing IO to devices behind an IOMMU from page
> types different than p2m_ram_rw the p2m tables cannot be shared, because
> the bits from 52 to 58 will indeed be different than 0, and will
> generate page faults.
>
> Roger.
As you have mentioned, they cannot be shared due to the 52 and 58 bits. 
 However, what I was trying to say is that, besides just simply set the 
flag to 0, we probably should remove existing logic in various places 
that assumes that AMD IOMMU can have share_p2m_table=1.
If you are agree, the attachment is the patch that should do that.

I have tested device-passthrough w/ the amd-iommu: disable 
iommu_hap_pt_share with AMD IOMMUs, and my patch and it is working.
Acked-by Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>

Thanks,

Suravee

Attachment: iommu-removal-of-share_p2m_table-from-AMD-IOMMU.patch
Description: Text Data

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