[Xen-devel] [PATCH ARM v7 07/13] mini-os: arm: scheduling

[Thomas Leonard <talex5@xxxxxxxxx>]

Based on an initial patch by Karim Raslan.

Signed-off-by: Karim Allah Ahmed <karim.allah.ahmed@xxxxxxxxx>
Signed-off-by: Thomas Leonard <talex5@xxxxxxxxx>

---
Changes since v6:

- fixed printk format types

Addressed Ian Campbell's points:
- replace "mov pc" with "bx"
- preserve all callee-saved registers on context switch
---
 extras/mini-os/arch/arm/arm32.S | 22 +++++++++++++++++++
 extras/mini-os/arch/arm/sched.c | 47 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)
 create mode 100644 extras/mini-os/arch/arm/sched.c

diff --git a/extras/mini-os/arch/arm/arm32.S b/extras/mini-os/arch/arm/arm32.S
index d2e6932..73223c8 100644
--- a/extras/mini-os/arch/arm/arm32.S
+++ b/extras/mini-os/arch/arm/arm32.S
@@ -204,8 +204,30 @@ irq_handler:
 IRQ_handler:
        .long   0x0
 
+
+.globl __arch_switch_threads
+@ => r0 = &prev->sp
+@    r1 = &next->sp
+@ <= returns to next thread's saved return address
+__arch_switch_threads:
+       push    {r4-r11}        @ Store callee-saved registers to old thread's 
stack
+       stmia   r0, {sp, lr}    @ Store current sp and ip to prev's struct 
thread
+
+       ldmia   r1, {sp, lr}    @ Load new sp, ip from next's struct thread
+       pop     {r4-r11}        @ Load callee-saved registers from new thread's 
stack
+
+       bx      lr
+
 @ This is called if you try to divide by zero. For now, we make a supervisor 
call,
 @ which will make us halt.
 .globl raise
 raise:
        svc     0
+
+.globl arm_start_thread
+arm_start_thread:
+       pop     {r0, r1}
+       @ r0 = user data
+       @ r1 -> thread's main function
+       ldr     lr, =exit_thread
+       bx      r1
diff --git a/extras/mini-os/arch/arm/sched.c b/extras/mini-os/arch/arm/sched.c
new file mode 100644
index 0000000..8091566
--- /dev/null
+++ b/extras/mini-os/arch/arm/sched.c
@@ -0,0 +1,47 @@
+#include <mini-os/sched.h>
+#include <mini-os/xmalloc.h>
+#include <mini-os/console.h>
+
+void arm_start_thread(void);
+
+/* The AAPCS requires the callee (e.g. __arch_switch_threads) to preserve 
r4-r11. */
+#define CALLEE_SAVED_REGISTERS 8
+
+/* Architecture specific setup of thread creation */
+struct thread* arch_create_thread(char *name, void (*function)(void *),
+                                  void *data)
+{
+    struct thread *thread;
+
+    thread = xmalloc(struct thread);
+    /* We can't use lazy allocation here since the trap handler runs on the 
stack */
+    thread->stack = (char *)alloc_pages(STACK_SIZE_PAGE_ORDER);
+    thread->name = name;
+    printk("Thread \"%s\": pointer: 0x%p, stack: 0x%p\n", name, thread,
+            thread->stack);
+
+    /* Save pointer to the thread on the stack, used by current macro */
+    *((unsigned long *)thread->stack) = (unsigned long)thread;
+
+    /* Push the details to pass to arm_start_thread onto the stack. */
+    int *sp = (int *) (thread->stack + STACK_SIZE);
+    *(--sp) = (int) function;
+    *(--sp) = (int) data;
+
+    /* We leave room for the 8 callee-saved registers which we will
+     * try to restore on thread switch, even though they're not needed
+     * for the initial switch. */
+    thread->sp = (unsigned long) sp - 4 * CALLEE_SAVED_REGISTERS;
+
+    thread->ip = (unsigned long) arm_start_thread;
+
+    return thread;
+}
+
+void run_idle_thread(void)
+{
+    __asm__ __volatile__ ("mov sp, %0; bx %1"::
+            "r"(idle_thread->sp + 4 * CALLEE_SAVED_REGISTERS),
+            "r"(idle_thread->ip));
+    /* Never arrive here! */
+}
-- 
2.0.3


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