[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 3/4] VMX: allow RTM advanced debugging to be used by guests
All that is needed here is allowing the respective DebugCtl MSR bit to be set by the guest. At once - even if PV guests can't currently use it due to missing DebugCtl MSR virtualization - make the respective adjustments to debugreg.h. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2246,6 +2246,8 @@ static int vmx_msr_write_intercept(unsig int i, rc = 0; uint64_t supported = IA32_DEBUGCTLMSR_LBR | IA32_DEBUGCTLMSR_BTF; + if ( boot_cpu_has(X86_FEATURE_RTM) ) + supported |= IA32_DEBUGCTLMSR_RTM; if ( msr_content & ~supported ) { /* Perhaps some other bits are supported in vpmu. */ --- a/xen/include/asm-x86/debugreg.h +++ b/xen/include/asm-x86/debugreg.h @@ -20,6 +20,7 @@ #define DR_TRAP3 (0x8) /* db3 */ #define DR_STEP (0x4000) /* single-step */ #define DR_SWITCH (0x8000) /* task switch */ +#define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */ /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 @@ -62,6 +63,7 @@ #define DR_CONTROL_RESERVED_ONE (0x00000400ul) /* Reserved, read as one */ #define DR_LOCAL_EXACT_ENABLE (0x00000100ul) /* Local exact enable */ #define DR_GLOBAL_EXACT_ENABLE (0x00000200ul) /* Global exact enable */ +#define DR_RTM_ENABLE (0x00000800ul) /* RTM debugging enable */ #define DR_GENERAL_DETECT (0x00002000ul) /* General detect enable */ #define write_debugreg(reg, val) do { \ --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -79,6 +79,7 @@ #define IA32_DEBUGCTLMSR_BTINT (1<<8) /* Branch Trace Interrupt */ #define IA32_DEBUGCTLMSR_BTS_OFF_OS (1<<9) /* BTS off if CPL 0 */ #define IA32_DEBUGCTLMSR_BTS_OFF_USR (1<<10) /* BTS off if CPL > 0 */ +#define IA32_DEBUGCTLMSR_RTM (1<<15) /* RTM debugging enable */ #define MSR_IA32_LASTBRANCHFROMIP 0x000001db #define MSR_IA32_LASTBRANCHTOIP 0x000001dc Attachment:
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