Re: [Xen-devel] [PATCH v7 3/4] x86/mem_event: Deliver gla fault EPT violation information

[Tim Deegan <tim@xxxxxxx>]

At 13:29 +0200 on 12 Aug (1407846594), Tamas K Lengyel wrote:
> On Intel EPT the exit qualification generated by a violation also includes a 
> bit (EPT_GLA_FAULT) which describes the following information:
> Set if the access causing the EPT violation is to a guest-physical address 
> that is the translation of a linear address. Clear if the access causing the 
> EPT violation is to a paging-structure entry as part of a page walk or the 
> update of an accessed or dirty bit.
> 
> For more information see Table 27-7 in the Intel SDM.
> 
> This patch extends the mem_event system to deliver this extra information, 
> which could be useful for determining the cause of a violation.
> 
> v7: Minor fix of setting the mem event response values twice and style 
> changes of SVM bit declarations.
> v6: Fixes regarding the enum usage.
> v5: Add missing bits to the SVM side, style fixes and switching to shared 
> struct+enum in mm.h.
> v4: Use new bitmaps to pass information.
> v3: Style fixes.
> v2: Split gla_fault into fault_in_gpt and fault_gla to be more compatible 
> with the AMD implementation.
> 
> Signed-off-by: Tamas K Lengyel <tamas.lengyel@xxxxxxxxxxxx>

Acked-by: Tim Deegan <tim@xxxxxxx>
 

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