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[Xen-devel] [PATCH] x86/hvm: add support for MSR 0x35

OS X interrogates MSR 0x35 to determine the number of enabled cores and
threads, and will fail to boot if reasonable values are not returned.
According to the OS X kernel source code (see osfmk/i386/cpuid.c), on
Westmere bits 19:16 are the core count and bits 15:0 are the thread
count, and on later families bits 31:16 are the core count and bits 15:0
are the thread count.  VirtualBox returns similar values (see

Signed-off-by: Eric Shelton <eshelton@xxxxxxxxx>
 xen/arch/x86/hvm/hvm.c          | 5 +++++
 xen/include/asm-x86/msr-index.h | 1 +
 2 files changed, 6 insertions(+)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 8d905d3..d181b10 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -4376,6 +4376,11 @@ int hvm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
         *msr_content = hvm_msr_tsc_aux(v);
+        *msr_content = (((uint64_t)v->domain->max_vcpus) << 16)
+                        | v->domain->max_vcpus;
+        break;
     case MSR_IA32_APICBASE:
         *msr_content = vcpu_vlapic(v)->hw.apic_base_msr;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 542222e..ee0757c 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -285,6 +285,7 @@
 #define MSR_IA32_PLATFORM_ID 0x00000017
 #define MSR_IA32_EBL_CR_POWERON 0x0000002a
 #define MSR_IA32_EBC_FREQUENCY_ID 0x0000002c
+#define MSR_IA32_CORE_THREAD_COUNT 0x00000035
 #define MSR_IA32_TSC_ADJUST 0x0000003b
 #define MSR_IA32_APICBASE 0x0000001b

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