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Re: [Xen-devel] [PATCH v8 for-xen-4.5 2/2] dpci: Replace tasklet with an softirq (v8)

On Thu, Oct 23, 2014 at 10:36:07AM +0100, Jan Beulich wrote: > >>> On 21.10.14 at 19:19, <konrad.wilk@xxxxxxxxxx> wrote: > > +/* > > + * These two bit states help to safely schedule, deschedule, and wait until > > + * the softirq has finished. > > + * > > + * The semantics behind these two bits is as follow: > > + * - STATE_SCHED - whoever clears it has to ref-count the domain (->dom). > > s/clears/modifies/ > > > + * - STATE_RUN - only the softirq is allowed to set and clear it. If it > > has > > + * been set the hvm_dirq_assist will RUN with an saved value of the > > s/ an / a / (and perhaps also ditch the first "the" on that line, > and the similarly further down) > > > + STATE_SCHED, /* Bit 0 */ > > Bogus comment (effectively re-stating what the language > specification says)? > > > +/* > > + * Should only be called from hvm_do_IRQ_dpci. We use the > > + * 'state' as an gate to thwart multiple interrupts being scheduled. > > s/ an / a / > > > + * > > + * The 'state' is cleared by 'softirq_dpci' when it has > > + * completed executing 'hvm_dirq_assist' or by 'pt_pirq_softirq_reset' > > + * if we want to try to unschedule the softirq before it runs. > > + * > > Stray blank comment line. All above fixed. > > > +/* > > + * If we are racing with softirq_dpci (state is still set) we return > > + * -ERESTART. Otherwise we return 0. > > + * > > + * If it is -ERESTART, it is the callers responsibility to make sure > > + * that the softirq (with the event_lock dropped) has ran. We need > > + * to flush out the outstanding 'dpci_softirq' (no more of them > > + * will be added for this pirq as the IRQ action handler has been > > + * reset in pt_irq_destroy_bind). > > + */ > > +int pt_pirq_softirq_active(struct hvm_pirq_dpci *pirq_dpci) > > +{ > > + if ( pirq_dpci->state & (STATE_RUN | STATE_SCHED) ) > > + return -ERESTART; > > + > > + /* > > + * If in the future we would call 'raise_softirq_for' right away > > + * after 'pt_pirq_softirq_active' we MUST reset the list (otherwise it > > + * might have stale data). > > + */ > > + return 0; > > +} > > Having this return -ERESTART and 0 rather than a simple boolean > is kind of odd as long as there are no other errors possible here. True. Replaced it with an bool_t. Was not sure whether you prefer 'true' or 'false' instead of numbers - decided on numbers since most of the code-base uses numbers. > > > +static void pt_pirq_softirq_reset(struct hvm_pirq_dpci *pirq_dpci) > > +{ > > + struct domain *d = pirq_dpci->dom; > > + > > + ASSERT(spin_is_locked(&d->event_lock)); > > + /* > > + * The reason it is OK to reset 'dom' when STATE_RUN bit is set is due > > + * to a shortcut the 'dpci_softirq' implements. It stashes the 'dom' in > > + * a local variable before it sets STATE_RUN - and therefore will not > > + * dereference '->dom' which would result in a crash. > > + */ > > + if ( test_bit(STATE_RUN, &pirq_dpci->state) ) > > + { > > + pirq_dpci->dom = NULL; > > + return; > > + } > > + /* > > + * We are going to try to de-schedule the softirq before it goes in > > + * STATE_RUN. Whoever clears STATE_SCHED MUST refcount the 'dom'. > > + */ > > + if ( test_and_clear_bit(STATE_SCHED, &pirq_dpci->state) ) > > + { > > + put_domain(d); > > + pirq_dpci->dom = NULL; > > + } > > Would it not be easier to follow if instead of the two if()-s you > used switch(cmpxchg(..., STATE_SCHED, 0)) here? Yes, done. Thought I was not clear on how to put the comments there > > > @@ -128,6 +234,21 @@ int pt_irq_create_bind( > > } > > pirq_dpci = pirq_dpci(info); > > /* > > + * A crude 'while' loop with us dropping the spinlock and giving > > + * the softirq_dpci a chance to run. > > + * We MUST check for this condition as the softirq could be scheduled > > + * and hasn't run yet. We do this up to one second at which point we > > + * give up. Note that this code replaced tasklet_kill which would have > > + * spun forever and would do the same thing (wait to flush out > > + * outstanding hvm_dirq_assist calls. > > + */ > > Stale comment - there's no 1s timeout here anymore. <nods> > > > + if ( pt_pirq_softirq_active(pirq_dpci) ) > > + { > > + spin_unlock(&d->event_lock); > > + process_pending_softirqs(); > > ASSERT_NOT_IN_ATOMIC() between these two (the assertion > process_pending_softirqs() does seems too weak for the purposes > here, as we really shouldn't be holding any other spin locks; otoh > it's not really clear to me why that aspect is different from > do_softirq() - just fired off a separate mail)? OK, for right now I have ASSERT_NOT_IN_ATOMIC in it. > > > @@ -400,8 +535,13 @@ int pt_irq_destroy_bind( > > msixtbl_pt_unregister(d, pirq); > > if ( pt_irq_need_timer(pirq_dpci->flags) ) > > kill_timer(&pirq_dpci->timer); > > - pirq_dpci->dom = NULL; > > pirq_dpci->flags = 0; > > + /* > > + * Before the 'pirq_guest_unbind' had been called an interrupt > > could > > + * have been scheduled. No more of them are going to be scheduled > > after > > + * that but we must deal with the one that were put in the queue. > > + */ > > This is the second of third instance of this or a similar comment. > Please have it just once in full, and have the other(s) simply refer > to the full one. I trimmed them down and also made reference to the top-most. > > > @@ -652,3 +773,81 @@ void hvm_dpci_eoi(struct domain *d, unsigned int > > guest_gsi, > > unlock: > > spin_unlock(&d->event_lock); > > } > > + > > +static void dpci_softirq(void) > > +{ > > + struct hvm_pirq_dpci *pirq_dpci; > > + unsigned int cpu = smp_processor_id(); > > + LIST_HEAD(our_list); > > + > > + local_irq_disable(); > > + list_splice_init(&per_cpu(dpci_list, cpu), &our_list); > > + local_irq_enable(); > > + > > + while ( !list_empty(&our_list) ) > > + { > > + struct domain *d; > > Considering that you already have one non-function scope variable > here, please use the other one only needed inside this loop > (pirq_dpci) here too. > > > + > > + pirq_dpci = list_entry(our_list.next, struct hvm_pirq_dpci, > > softirq_list); > > + list_del(&pirq_dpci->softirq_list); > > + > > + d = pirq_dpci->dom; > > + smp_wmb(); /* 'd' MUST be saved before we set/clear the bits. */ > > So you state the right thing, but use the wrong barrier: To order a > read and a write, smp_mb() is your only choice. Done. > > > -void pci_release_devices(struct domain *d) > > +int pci_release_devices(struct domain *d) > > { > > struct pci_dev *pdev; > > u8 bus, devfn; > > + int ret; > > > > spin_lock(&pcidevs_lock); > > - pci_clean_dpci_irqs(d); > > + ret = pci_clean_dpci_irqs(d); > > + if ( ret == -EAGAIN ) > > -ERESTART? > > > --- a/xen/include/xen/hvm/irq.h > > +++ b/xen/include/xen/hvm/irq.h > > @@ -93,13 +93,13 @@ struct hvm_irq_dpci { > > /* Machine IRQ to guest device/intx mapping. */ > > struct hvm_pirq_dpci { > > uint32_t flags; > > - bool_t masked; > > + unsigned long state; > > I think "unsigned int" would be sufficient here? Yes. See inline and attached patch pls. From c958ee7d4350584a1d6654615303819bf987b8e8 Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> Date: Thu, 23 Oct 2014 20:41:24 -0400 Subject: [PATCH 2/2] dpci: Replace tasklet with an softirq (v9) The existing tasklet mechanism has a single global spinlock that is taken every-time the global list is touched. And we use this lock quite a lot - when we call do_tasklet_work which is called via an softirq and from the idle loop. We take the lock on any operation on the tasklet_list. The problem we are facing is that there are quite a lot of tasklets scheduled. The most common one that is invoked is the one injecting the VIRQ_TIMER in the guest. Guests are not insane and don't set the one-shot or periodic clocks to be in sub 1ms intervals (causing said tasklet to be scheduled for such small intervalls). The problem appears when PCI passthrough devices are used over many sockets and we have an mix of heavy-interrupt guests and idle guests. The idle guests end up seeing 1/10 of its RUNNING timeslice eaten by the hypervisor (and 40% steal time). The mechanism by which we inject PCI interrupts is by hvm_do_IRQ_dpci which schedules the hvm_dirq_assist tasklet every time an interrupt is received. The callchain is: _asm_vmexit_handler -> vmx_vmexit_handler ->vmx_do_extint -> do_IRQ -> __do_IRQ_guest -> hvm_do_IRQ_dpci tasklet_schedule(&dpci->dirq_tasklet); [takes lock to put the tasklet on] [later on the schedule_tail is invoked which is 'vmx_do_resume'] vmx_do_resume -> vmx_asm_do_vmentry -> call vmx_intr_assist -> vmx_process_softirqs -> do_softirq [executes the tasklet function, takes the lock again] While on other CPUs they might be sitting in a idle loop and invoked to deliver an VIRQ_TIMER, which also ends up taking the lock twice: first to schedule the v->arch.hvm_vcpu.assert_evtchn_irq_tasklet (accounted to the guests' BLOCKED_state); then to execute it - which is accounted for in the guest's RUNTIME_state. The end result is that on a 8 socket machine with PCI passthrough, where four sockets are busy with interrupts, and the other sockets have idle guests - we end up with the idle guests having around 40% steal time and 1/10 of its timeslice (3ms out of 30 ms) being tied up taking the lock. The latency of the PCI interrupts delieved to guest is also hindered. With this patch the problem disappears completly. That is removing the lock for the PCI passthrough use-case (the 'hvm_dirq_assist' case) by not using tasklets at all. The patch is simple - instead of scheduling an tasklet we schedule our own softirq - HVM_DPCI_SOFTIRQ, which will take care of running 'hvm_dirq_assist'. The information we need on each CPU is which 'struct hvm_pirq_dpci' structure the 'hvm_dirq_assist' needs to run on. That is simple solved by threading the 'struct hvm_pirq_dpci' through a linked list. The rule of only running one 'hvm_dirq_assist' for only one 'hvm_pirq_dpci' is also preserved by having 'schedule_dpci_for' ignore any subsequent calls for an domain which has already been scheduled. == Code details == Most of the code complexity comes from the '->dom' field in the 'hvm_pirq_dpci' structure. We use it for ref-counting and as such it MUST be valid as long as STATE_SCHED bit is set. Whoever clears the STATE_SCHED bit does the ref-counting and can also reset the '->dom' field. To compound the complexity, there are multiple points where the 'hvm_pirq_dpci' structure is reset or re-used. Initially (first time the domain uses the pirq), the 'hvm_pirq_dpci->dom' field is set to NULL as it is allocated. On subsequent calls in to 'pt_irq_create_bind' the ->dom is whatever it had last time. As this is the initial call (which QEMU ends up calling when the guest writes an vector value in the MSI field) we MUST set the '->dom' to a the proper structure (otherwise we cannot do proper ref-counting). The mechanism to tear it down is more complex as there are three ways it can be executed. To make it simpler everything revolves around 'pt_pirq_softirq_active'. If it returns -EAGAIN that means there is an outstanding softirq that needs to finish running before we can continue tearing down. With that in mind: a) pci_clean_dpci_irq. This gets called when the guest is being destroyed. We end up calling 'pt_pirq_softirq_active' to see if it is OK to continue the destruction. The scenarios in which the 'struct pirq' (and subsequently the 'hvm_pirq_dpci') gets destroyed is when: - guest did not use the pirq at all after setup. - guest did use pirq, but decided to mask and left it in that state. - guest did use pirq, but crashed. In all of those scenarios we end up calling 'pt_pirq_softirq_active' to check if the softirq is still active. Read below on the 'pt_pirq_softirq_active' loop. b) pt_irq_destroy_bind (guest disables the MSI). We double-check that the softirq has run by piggy-backing on the existing 'pirq_cleanup_check' mechanism which calls 'pt_pirq_cleanup_check'. We add the extra call to 'pt_pirq_softirq_active' in 'pt_pirq_cleanup_check'. NOTE: Guests that use event channels unbind first the event channel from PIRQs, so the 'pt_pirq_cleanup_check' won't be called as 'event' is set to zero. In that case we either clean it up via the a) or c) mechanism. There is an extra scenario regardless of 'event' being set or not: the guest did 'pt_irq_destroy_bind' while an interrupt was triggered and softirq was scheduled (but had not been run). It is OK to still run the softirq as hvm_dirq_assist won't do anything (as the flags are set to zero). However we will try to deschedule the softirq if we can (by clearing the STATE_SCHED bit and us doing the ref-counting). c) pt_irq_create_bind (not a typo). The scenarios are: - guest disables the MSI and then enables it (rmmod and modprobe in a loop). We call 'pt_pirq_reset' which checks to see if the softirq has been scheduled. Imagine the 'b)' with interrupts in flight and c) getting called in a loop. We will spin up on 'pt_pirq_is_active' (at the start of the 'pt_irq_create_bind') with the event_lock spinlock dropped and calling 'process_pending_softirqs'. hvm_dirq_assist will be executed and then the softirq will clear 'state' which signals that that we can re-use the 'hvm_pirq_dpci' structure. - we hit once the error paths in 'pt_irq_create_bind' while an interrupt was triggered and softirq was scheduled. If the softirq is in STATE_RUN that means it is executing and we should let it continue on. We can clear the '->dom' field as the softirq has stashed it beforehand. If the softirq is STATE_SCHED and we are successful in clearing it, we do the ref-counting and clear the '->dom' field. Otherwise we let the softirq continue on and the '->dom' field is left intact. The clearing of the '->dom' is left to a), b) or again c) case. Note that in both cases the 'flags' variable is cleared so hvm_dirq_assist won't actually do anything. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> Suggested-by: Jan Beulich <JBeulich@xxxxxxxx> --- v2: On top of ref-cnts also have wait loop for the outstanding 'struct domain' that need to be processed. v3: Add -ERETRY, fix up StyleGuide issues v4: Clean it up mode, redo per_cpu, this_cpu logic v5: Instead of threading struct domain, use hvm_pirq_dpci. v6: Ditch the 'state' bit, expand description, simplify softirq and teardown sequence. v7: Flesh out the comments. Drop the use of domain refcounts v8: Add two bits (STATE_[SCHED|RUN]) to allow refcounts. v9: Use cmpxchg, ASSSERT, fix up comments per Jan. --- xen/arch/x86/domain.c | 4 +- xen/drivers/passthrough/io.c | 251 +++++++++++++++++++++++++++++++++++++----- xen/drivers/passthrough/pci.c | 31 ++++-- xen/include/asm-x86/softirq.h | 3 +- xen/include/xen/hvm/irq.h | 5 +- xen/include/xen/pci.h | 2 +- 6 files changed, 253 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index ae0a344..73d01bb 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1965,7 +1965,9 @@ int domain_relinquish_resources(struct domain *d) switch ( d->arch.relmem ) { case RELMEM_not_started: - pci_release_devices(d); + ret = pci_release_devices(d); + if ( ret ) + return ret; /* Tear down paging-assistance stuff. */ ret = paging_teardown(d); diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index dceb17e..342406e 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -20,14 +20,119 @@ #include <xen/event.h> #include <xen/iommu.h> +#include <xen/cpu.h> #include <xen/irq.h> #include <asm/hvm/irq.h> #include <asm/hvm/iommu.h> #include <asm/hvm/support.h> #include <xen/hvm/irq.h> -#include <xen/tasklet.h> -static void hvm_dirq_assist(unsigned long arg); +static DEFINE_PER_CPU(struct list_head, dpci_list); + +/* + * These two bit states help to safely schedule, deschedule, and wait until + * the softirq has finished. + * + * The semantics behind these two bits is as follow: + * - STATE_SCHED - whoever modifies it has to ref-count the domain (->dom). + * - STATE_RUN - only softirq is allowed to set and clear it. If it has + * been set hvm_dirq_assist will RUN with a saved value of the + * 'struct domain' copied from 'pirq_dpci->dom' before STATE_RUN was set. + * + * The usual states are: STATE_SCHED(set) -> STATE_RUN(set) -> + * STATE_SCHED(unset) -> STATE_RUN(unset). + * + * However the states can also diverge such as: STATE_SCHED(set) -> + * STATE_SCHED(unset) -> STATE_RUN(set) -> STATE_RUN(unset). That means + * the 'hvm_dirq_assist' never run and that the softirq did not do any + * ref-counting. + */ +enum { + STATE_SCHED, + STATE_RUN, +}; + +/* + * Should only be called from hvm_do_IRQ_dpci. We use the + * 'state' as a gate to thwart multiple interrupts being scheduled. + * The 'state' is cleared by 'softirq_dpci' when it has + * completed executing 'hvm_dirq_assist' or by 'pt_pirq_softirq_reset' + * if we want to try to unschedule the softirq before it runs. + * + */ +static void raise_softirq_for(struct hvm_pirq_dpci *pirq_dpci) +{ + unsigned long flags; + + if ( test_and_set_bit(STATE_SCHED, &pirq_dpci->state) ) + return; + + get_knownalive_domain(pirq_dpci->dom); + + local_irq_save(flags); + list_add_tail(&pirq_dpci->softirq_list, &this_cpu(dpci_list)); + local_irq_restore(flags); + + raise_softirq(HVM_DPCI_SOFTIRQ); +} + +/* + * If we are racing with softirq_dpci (state is still set) we return + * true. Otherwise we return false. + * + * If it is false, it is the callers responsibility to make sure + * that the softirq (with the event_lock dropped) has ran. We need + * to flush out the outstanding 'dpci_softirq' (no more of them + * will be added for this pirq as the IRQ action handler has been + * reset in pt_irq_destroy_bind). + */ +bool_t pt_pirq_softirq_active(struct hvm_pirq_dpci *pirq_dpci) +{ + if ( pirq_dpci->state & (STATE_RUN | STATE_SCHED) ) + return 1; + + /* + * If in the future we would call 'raise_softirq_for' right away + * after 'pt_pirq_softirq_active' we MUST reset the list (otherwise it + * might have stale data). + */ + return 0; +} + +/* + * Reset the pirq_dpci->dom parameter to NULL. + * + * This function checks the different states to make sure it can do + * at the right time and if unschedules the softirq before it has + * run it also refcounts (which is what the softirq would have done). + */ +static void pt_pirq_softirq_reset(struct hvm_pirq_dpci *pirq_dpci) +{ + struct domain *d = pirq_dpci->dom; + + ASSERT(spin_is_locked(&d->event_lock)); + switch ( cmpxchg(&pirq_dpci->state, STATE_SCHED, 0) ) + { + /* + * We are going to try to de-schedule the softirq before it goes in + * STATE_RUN. Whoever clears STATE_SCHED MUST refcount the 'dom'. + */ + case STATE_SCHED: + put_domain(d); + /* fallthrough. */ + /* + * The reason it is OK to reset 'dom' when STATE_RUN bit is set is due + * to a shortcut the 'dpci_softirq' implements. It stashes the 'dom' in + * a local variable before it sets STATE_RUN - and therefore will not + * dereference '->dom' which would result in a crash. + */ + case STATE_RUN: + pirq_dpci->dom = NULL; + break; + default: + break; + } +} bool_t pt_irq_need_timer(uint32_t flags) { @@ -40,7 +145,7 @@ static int pt_irq_guest_eoi(struct domain *d, struct hvm_pirq_dpci *pirq_dpci, if ( __test_and_clear_bit(_HVM_IRQ_DPCI_EOI_LATCH_SHIFT, &pirq_dpci->flags) ) { - pirq_dpci->masked = 0; + pirq_dpci->state = 0; pirq_dpci->pending = 0; pirq_guest_eoi(dpci_pirq(pirq_dpci)); } @@ -101,6 +206,7 @@ int pt_irq_create_bind( if ( pirq < 0 || pirq >= d->nr_pirqs ) return -EINVAL; + restart: spin_lock(&d->event_lock); hvm_irq_dpci = domain_get_irq_dpci(d); @@ -127,7 +233,21 @@ int pt_irq_create_bind( return -ENOMEM; } pirq_dpci = pirq_dpci(info); - + /* + * A crude 'while' loop with us dropping the spinlock and giving + * the softirq_dpci a chance to run. + * We MUST check for this condition as the softirq could be scheduled + * and hasn't run yet. Note that this code replaced tasklet_kill which + * would have spun forever and would do the same thing (wait to flush out + * outstanding hvm_dirq_assist calls. + */ + if ( pt_pirq_softirq_active(pirq_dpci) ) + { + spin_unlock(&d->event_lock); + ASSERT_NOT_IN_ATOMIC(); + process_pending_softirqs(); + goto restart; + } switch ( pt_irq_bind->irq_type ) { case PT_IRQ_TYPE_MSI: @@ -165,8 +285,14 @@ int pt_irq_create_bind( { pirq_dpci->gmsi.gflags = 0; pirq_dpci->gmsi.gvec = 0; - pirq_dpci->dom = NULL; pirq_dpci->flags = 0; + /* + * Between the 'pirq_guest_bind' and before 'pirq_guest_unbind' + * an interrupt can be scheduled. No more of them are going to + * be scheduled but we must deal with the one that is in the + * queue. + */ + pt_pirq_softirq_reset(pirq_dpci); pirq_cleanup_check(info, d); spin_unlock(&d->event_lock); return rc; @@ -269,6 +395,10 @@ int pt_irq_create_bind( { if ( pt_irq_need_timer(pirq_dpci->flags) ) kill_timer(&pirq_dpci->timer); + /* + * There is no path for __do_IRQ to schedule softirq as + * IRQ_GUEST is not set. As such we can reset 'dom' right away. + */ pirq_dpci->dom = NULL; list_del(&girq->list); list_del(&digl->list); @@ -402,8 +532,12 @@ int pt_irq_destroy_bind( msixtbl_pt_unregister(d, pirq); if ( pt_irq_need_timer(pirq_dpci->flags) ) kill_timer(&pirq_dpci->timer); - pirq_dpci->dom = NULL; pirq_dpci->flags = 0; + /* + * See comment in pt_irq_create_bind's PT_IRQ_TYPE_MSI before the + * call to pt_pirq_softirq_reset. + */ + pt_pirq_softirq_reset(pirq_dpci); pirq_cleanup_check(pirq, d); } @@ -426,14 +560,12 @@ void pt_pirq_init(struct domain *d, struct hvm_pirq_dpci *dpci) { INIT_LIST_HEAD(&dpci->digl_list); dpci->gmsi.dest_vcpu_id = -1; - softirq_tasklet_init(&dpci->tasklet, hvm_dirq_assist, (unsigned long)dpci); } bool_t pt_pirq_cleanup_check(struct hvm_pirq_dpci *dpci) { - if ( !dpci->flags ) + if ( !dpci->flags && !pt_pirq_softirq_active(dpci) ) { - tasklet_kill(&dpci->tasklet); dpci->dom = NULL; return 1; } @@ -476,8 +608,7 @@ int hvm_do_IRQ_dpci(struct domain *d, struct pirq *pirq) !(pirq_dpci->flags & HVM_IRQ_DPCI_MAPPED) ) return 0; - pirq_dpci->masked = 1; - tasklet_schedule(&pirq_dpci->tasklet); + raise_softirq_for(pirq_dpci); return 1; } @@ -531,28 +662,12 @@ void hvm_dpci_msi_eoi(struct domain *d, int vector) spin_unlock(&d->event_lock); } -static void hvm_dirq_assist(unsigned long arg) +static void hvm_dirq_assist(struct domain *d, struct hvm_pirq_dpci *pirq_dpci) { - struct hvm_pirq_dpci *pirq_dpci = (struct hvm_pirq_dpci *)arg; - struct domain *d = pirq_dpci->dom; - - /* - * We can be racing with 'pt_irq_destroy_bind' - with us being scheduled - * right before 'pirq_guest_unbind' gets called - but us not yet executed. - * - * And '->dom' gets cleared later in the destroy path. We exit and clear - * 'masked' - which is OK as later in this code we would - * do nothing except clear the ->masked field anyhow. - */ - if ( !d ) - { - pirq_dpci->masked = 0; - return; - } ASSERT(d->arch.hvm_domain.irq.dpci); spin_lock(&d->event_lock); - if ( test_and_clear_bool(pirq_dpci->masked) ) + if ( pirq_dpci->state ) { struct pirq *pirq = dpci_pirq(pirq_dpci); const struct dev_intx_gsi_link *digl; @@ -654,3 +769,81 @@ void hvm_dpci_eoi(struct domain *d, unsigned int guest_gsi, unlock: spin_unlock(&d->event_lock); } + +static void dpci_softirq(void) +{ + unsigned int cpu = smp_processor_id(); + LIST_HEAD(our_list); + + local_irq_disable(); + list_splice_init(&per_cpu(dpci_list, cpu), &our_list); + local_irq_enable(); + + while ( !list_empty(&our_list) ) + { + struct hvm_pirq_dpci *pirq_dpci; + struct domain *d; + + pirq_dpci = list_entry(our_list.next, struct hvm_pirq_dpci, softirq_list); + list_del(&pirq_dpci->softirq_list); + + d = pirq_dpci->dom; + smp_mb(); /* 'd' MUST be saved before we set/clear the bits. */ + if ( test_and_set_bit(STATE_RUN, &pirq_dpci->state) ) + BUG(); + /* + * The one who clears STATE_SCHED MUST refcount the domain. + */ + if ( test_and_clear_bit(STATE_SCHED, &pirq_dpci->state) ) + { + hvm_dirq_assist(d, pirq_dpci); + put_domain(d); + } + clear_bit(STATE_RUN, &pirq_dpci->state); + } +} + +static int cpu_callback( + struct notifier_block *nfb, unsigned long action, void *hcpu) +{ + unsigned int cpu = (unsigned long)hcpu; + + switch ( action ) + { + case CPU_UP_PREPARE: + INIT_LIST_HEAD(&per_cpu(dpci_list, cpu)); + break; + case CPU_UP_CANCELED: + case CPU_DEAD: + /* + * On CPU_DYING this callback is called (on the CPU that is dying) + * with an possible HVM_DPIC_SOFTIRQ pending - at which point we can + * clear out any outstanding domains (by the virtue of the idle loop + * calling the softirq later). In CPU_DEAD case the CPU is deaf and + * there are no pending softirqs for us to handle so we can chill. + */ + ASSERT(list_empty(&per_cpu(dpci_list, cpu))); + break; + default: + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block cpu_nfb = { + .notifier_call = cpu_callback, +}; + +static int __init setup_dpci_softirq(void) +{ + unsigned int cpu; + + for_each_online_cpu(cpu) + INIT_LIST_HEAD(&per_cpu(dpci_list, cpu)); + + open_softirq(HVM_DPCI_SOFTIRQ, dpci_softirq); + register_cpu_notifier(&cpu_nfb); + return 0; +} +__initcall(setup_dpci_softirq); diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 81e8a3a..d612cfa 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -767,40 +767,51 @@ static int pci_clean_dpci_irq(struct domain *d, xfree(digl); } - tasklet_kill(&pirq_dpci->tasklet); - - return 0; + return pt_pirq_softirq_active(pirq_dpci); } -static void pci_clean_dpci_irqs(struct domain *d) +static int pci_clean_dpci_irqs(struct domain *d) { struct hvm_irq_dpci *hvm_irq_dpci = NULL; if ( !iommu_enabled ) - return; + return -ENODEV; if ( !is_hvm_domain(d) ) - return; + return -EINVAL; spin_lock(&d->event_lock); hvm_irq_dpci = domain_get_irq_dpci(d); if ( hvm_irq_dpci != NULL ) { - pt_pirq_iterate(d, pci_clean_dpci_irq, NULL); + int ret = pt_pirq_iterate(d, pci_clean_dpci_irq, NULL); + + if ( ret ) + { + spin_unlock(&d->event_lock); + return ret; + } d->arch.hvm_domain.irq.dpci = NULL; free_hvm_irq_dpci(hvm_irq_dpci); } spin_unlock(&d->event_lock); + return 0; } -void pci_release_devices(struct domain *d) +int pci_release_devices(struct domain *d) { struct pci_dev *pdev; u8 bus, devfn; + int ret; spin_lock(&pcidevs_lock); - pci_clean_dpci_irqs(d); + ret = pci_clean_dpci_irqs(d); + if ( ret == -ERESTART ) + { + spin_unlock(&pcidevs_lock); + return ret; + } while ( (pdev = pci_get_pdev_by_domain(d, -1, -1, -1)) ) { bus = pdev->bus; @@ -811,6 +822,8 @@ void pci_release_devices(struct domain *d) PCI_SLOT(devfn), PCI_FUNC(devfn)); } spin_unlock(&pcidevs_lock); + + return 0; } #define PCI_CLASS_BRIDGE_HOST 0x0600 diff --git a/xen/include/asm-x86/softirq.h b/xen/include/asm-x86/softirq.h index 7225dea..ec787d6 100644 --- a/xen/include/asm-x86/softirq.h +++ b/xen/include/asm-x86/softirq.h @@ -7,7 +7,8 @@ #define MACHINE_CHECK_SOFTIRQ (NR_COMMON_SOFTIRQS + 3) #define PCI_SERR_SOFTIRQ (NR_COMMON_SOFTIRQS + 4) -#define NR_ARCH_SOFTIRQS 5 +#define HVM_DPCI_SOFTIRQ (NR_COMMON_SOFTIRQS + 5) +#define NR_ARCH_SOFTIRQS 6 bool_t arch_skip_send_event_check(unsigned int cpu); diff --git a/xen/include/xen/hvm/irq.h b/xen/include/xen/hvm/irq.h index 94a550a..9709397 100644 --- a/xen/include/xen/hvm/irq.h +++ b/xen/include/xen/hvm/irq.h @@ -93,13 +93,13 @@ struct hvm_irq_dpci { /* Machine IRQ to guest device/intx mapping. */ struct hvm_pirq_dpci { uint32_t flags; - bool_t masked; + unsigned int state; uint16_t pending; struct list_head digl_list; struct domain *dom; struct hvm_gmsi_info gmsi; struct timer timer; - struct tasklet tasklet; + struct list_head softirq_list; }; void pt_pirq_init(struct domain *, struct hvm_pirq_dpci *); @@ -109,6 +109,7 @@ int pt_pirq_iterate(struct domain *d, struct hvm_pirq_dpci *, void *arg), void *arg); +bool_t pt_pirq_softirq_active(struct hvm_pirq_dpci *); /* Modify state of a PCI INTx wire. */ void hvm_pci_intx_assert( struct domain *d, unsigned int device, unsigned int intx); diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 91520bc..5f295f3 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -99,7 +99,7 @@ struct pci_dev *pci_lock_domain_pdev( void setup_hwdom_pci_devices(struct domain *, int (*)(u8 devfn, struct pci_dev *)); -void pci_release_devices(struct domain *d); +int pci_release_devices(struct domain *d); int pci_add_segment(u16 seg); const unsigned long *pci_get_ro_map(u16 seg); int pci_add_device(u16 seg, u8 bus, u8 devfn, const struct pci_dev_info *); -- 1.9.3

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