Re: [Xen-devel] Xen 4.5 random freeze question

[Andrii Tseglytskyi <andrii.tseglytskyi@xxxxxxxxxxxxxxx>]

Hi Stefano,

Thank you for your answer.

On Mon, Nov 17, 2014 at 6:39 PM, Stefano Stabellini
<stefano.stabellini@xxxxxxxxxxxxx> wrote:
> Although it is possible that that patch is the cause of your problem,
> unfortunately it is part of a significant rework of the GIC driver in
> Xen and I am afraid that testing with only a portion of that patch
> series might introduce other subtle bugs.  For your reference the series
> starts at commit 6f91502be64a05d0635454d629118b96ae38b50f and ends at
> commit 72eaf29e8d70784aaf066ead79df1295a25ecfd0.
>

Yes, I tested with and without the whole series.

> If 5495a512b63bad868c147198f7f049c2617d468c is really the cause of your
> problem, one idea that comes to mind is that GICH_LR_MAINTENANCE_IRQ
> might not work correctly on your platform. It wouldn't be the first time
> that we see hardware behaving that way, especially if you are using the
> GIC secure registers instead of the non-secure register as GICH_LRn.HW
> can only deactivate non-secure interrupts. This is usually due to a
> configuration error in u-boot.
>
> Could you please try to set PLATFORM_QUIRK_GUEST_PIRQ_NEED_EOI for your
> platform?
>

I tried this. Unfortunately it doesn't help.

Regards,
Andrii

>
>
> On Mon, 17 Nov 2014, Andrii Tseglytskyi wrote:
>> Hi,
>>
>> Issue occurs after the following commit:
>>
>> commit 5495a512b63bad868c147198f7f049c2617d468c
>> Author: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
>> Date:   Tue Jun 10 15:07:12 2014 +0100
>>
>>     xen/arm: support HW interrupts, do not request maintenance_interrupts
>>
>>     If the irq to be injected is an hardware irq (p->desc != NULL), set
>>     GICH_LR_HW. Do not set GICH_LR_MAINTENANCE_IRQ.
>>
>>
>> I'm going to debug it deeply.
>> Stefano - may be you have a feeling what it can be ?
>>
>> Regards,
>> Andrii
>>
>>
>> On Fri, Nov 14, 2014 at 6:40 PM, Andrii Tseglytskyi
>> <andrii.tseglytskyi@xxxxxxxxxxxxxxx> wrote:
>> > Hi Julien,
>> >
>> >> I would be surprised that the next GIC series impact this code as the
>> >> next driver is only compiled for arm64 (GICv3 doesn't exist on arm32).
>> >> Though, there was some refactoring.
>> >
>> > I meant that code was divided for generic GIC and GICv2 together with
>> > refactoring. Also in mails I saw that it was initially tested without
>> > SMP.
>> > GICv3 has no impacts for sure.
>> >
>> >>
>> >> The interrupt management has also been reworked for Xen 4.5 to avoid
>> >> maintenance interrupt. I would give a look on this part.
>> >
>> > Thanks, this may help.
>> >
>> > Regards,
>> > Andrii
>> >
>> >
>> >>
>> >> Regards,
>> >>
>> >> --
>> >> Julien Grall
>> >
>> >
>> >
>> > --
>> >
>> > Andrii Tseglytskyi | Embedded Dev
>> > GlobalLogic
>> > www.globallogic.com
>>
>>
>>
>> --
>>
>> Andrii Tseglytskyi | Embedded Dev
>> GlobalLogic
>> www.globallogic.com
>>



-- 

Andrii Tseglytskyi | Embedded Dev
GlobalLogic
www.globallogic.com

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