Re: [Xen-devel] Xen 4.5 random freeze question

[Julien Grall <julien.grall@xxxxxxxxxx>]

On 11/20/2014 10:28 AM, Stefano Stabellini wrote:
> On Wed, 19 Nov 2014, Andrii Tseglytskyi wrote:
>> 19 ÐÐÑÑ. 2014 20:32, ÐÐÑÐÑÑÑÐÐÑ "Stefano Stabellini" 
>> <stefano.stabellini@xxxxxxxxxxxxx> ÐÐÐÐÑÐÐ:
>>>
>>> On Wed, 19 Nov 2014, Julien Grall wrote:
>>>> On 11/19/2014 06:14 PM, Stefano Stabellini wrote:
>>>>> That's right, the maintenance interrupt handler is not called, but it
>>>>> doesn't do anything so we are fine. The important thing is that an
>>>>> interrupt is sent and git_clear_lrs gets called on hypervisor entry.
>>>>
>>>> It would be worth to write down this somewhere. Just in case someone
>>>> decide to add code in maintenance interrupt later.
>>>
>>> Yes, I could add a comment in the handler
>>
>> Maybe it wouldn't take a lot of effort to fix it? I am just worrying that we 
>> may hide some issue -
>> typically spurious interrupt this not what is expected.
> 
> My guess is that by clearing UIE before reading GICC_IAR, we "clear" the
> maintenance interrupt too, as a consequence the following read to
> GICC_IAR would return 1023 (nothing to be read). As bit as if the
> maintenance interrupt was a level interrupt and we just disabled it.
> 
> So I think that if we cleared UIE after reading GICC_IAR, GICC_IAR would
> return the correct value.
> 
> However with the current structure of the code, the first thing that we
> do upon entering the hypervisor is clearing LRs and given what happened
> on your platform I think is a good idea to do it with UIE disabled.

Agreed. UIE should be disabled to avoid another maintenance interrupt as
soon as we EOI the IRQ.

> This is way I would rather read spurious interrupts but read/write LRs
> with UIE disabled than reading maintenance interrupts but risking
> strange behaviours on some platforms.

Reading the GIC-v2 documentation, the spurious interrupt things should
happen on any platform every time the UIE is disabled while we receive a
maintenance interrupt.

"The read returns a spurious interrupt ID of 1023 if any of the
following apply:

- no pending interrupt on the CPU interface has sufficient priority for
the interface to signal it to the processor"

-- 
Julien Grall

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